SN74AUC1G14
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- Available in the Texas Instruments NanoFree™ Package
- Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- Ioff Supports Partial-Power-Down Mode Operation
- Sub-1-V Operable
- Max tpd of 2.5 ns at 1.8 V
- Low Power Consumption, 10-µA Max ICC
- ±8-mA Output Drive at 1.8 V
This single Schmitt-trigger inverter is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUC1G14 contains one inverter and performs the Boolean function Y = A. The device functions as an independent inverter, but because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negative-going (VT–) signals.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, see Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, SCEA027.
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기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | SN74AUC1G14 Single Schmitt-Trigger Inverter datasheet (Rev. P) | PDF | HTML | 2017. 6. 8 | |
| * | 방사능 및 안정성 보고서 | EP Microcircuit Qualification Report - SN74AUC1G14MDBVREP | 2019. 6. 24 | ||
| Application brief | Understanding Schmitt Triggers (Rev. B) | PDF | HTML | 2025. 4. 17 |
설계 및 개발
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5-8-LOGIC-EVM — 5핀~8핀 DCK, DCT, DCU, DRL 및 DBV 패키지용 일반 논리 평가 모듈
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| DSBGA (YZP) | 5 | Ultra Librarian |
| SOT-23 (DBV) | 5 | Ultra Librarian |
| SOT-SC70 (DCK) | 5 | Ultra Librarian |