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UCC3808-1

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具有 12.5/8.3V UVLO、温度范围为 0°C 至 70°C 的低功耗电流模式推挽式 PWM

产品详情

Topology Push pull Control mode Current Features Error amplifier, Multi-topology, Soft start Duty cycle (max) (%) 49
Topology Push pull Control mode Current Features Error amplifier, Multi-topology, Soft start Duty cycle (max) (%) 49
SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm) PDIP (P) 8 92.5083 mm² (9.81 mm × 9.43 mm)
  • Dual output drive stages in push-pull configuration
  • 130µA typical starting current
  • 1mA typical run current
  • Operation to 1MHz
  • Internal soft-start
  • On-chip error amplifier with 2MHz gain bandwidth product
  • On-chip VDD clamping
  • Output drive stages capable of 500mA peak source current, 1A peak sink current
  • Dual output drive stages in push-pull configuration
  • 130µA typical starting current
  • 1mA typical run current
  • Operation to 1MHz
  • Internal soft-start
  • On-chip error amplifier with 2MHz gain bandwidth product
  • On-chip VDD clamping
  • Output drive stages capable of 500mA peak source current, 1A peak sink current

The UCCx808-x is a family of BiCMOS push-pull pulse-width modulators that are high-speed and low-power. The UCCx808 contains all of the control and drive circuitry required for offline or DC-to-DC fixed frequency current-mode switching power supplies with a minimal external parts count.

The UCCx808-x dual output drive stages are arranged in a push-pull configuration. Both outputs switch at half the oscillator frequency using a toggle flip-flop. The dead time between the two outputs is typically 60ns to 200ns, depending on the values of the timing capacitor and resistors, thus limiting each output stage duty cycle to less than 50%.

The UCCx808-x is a family of BiCMOS push-pull pulse-width modulators that are high-speed and low-power. The UCCx808 contains all of the control and drive circuitry required for offline or DC-to-DC fixed frequency current-mode switching power supplies with a minimal external parts count.

The UCCx808-x dual output drive stages are arranged in a push-pull configuration. Both outputs switch at half the oscillator frequency using a toggle flip-flop. The dead time between the two outputs is typically 60ns to 200ns, depending on the values of the timing capacitor and resistors, thus limiting each output stage duty cycle to less than 50%.

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 UCCx808-x Low Power Current Mode Push-Pull PWM 数据表 (Rev. F) PDF | HTML 2025-7-18
选择指南 电源管理指南 2018 2018-7-31
应用手册 Current Doubler Rectifier Offers Ripple Current Cancellation 2004-9-21

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封装 引脚 CAD 符号、封装和 3D 模型
SOIC (D) 8 Ultra Librarian
PDIP (P) 8 Ultra Librarian

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