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UC3572

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具有欠压锁定电路的负输出反激脉宽调制器

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UC3572

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产品详情

Vin (min) (V) 4.2 Vin (max) (V) 35 Iout (max) (A) 2 Operating temperature range (°C) 0 to 70 Control mode Voltage mode Topology Boost, Buck Rating Catalog Vout (min) (V) -70 Vout (max) (V) -1 Iq (typ) (A) 0.009 Duty cycle (max) (%) 100
Vin (min) (V) 4.2 Vin (max) (V) 35 Iout (max) (A) 2 Operating temperature range (°C) 0 to 70 Control mode Voltage mode Topology Boost, Buck Rating Catalog Vout (min) (V) -70 Vout (max) (V) -1 Iq (typ) (A) 0.009 Duty cycle (max) (%) 100
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Simple Single Inductor Flyback PWM for Negative Voltage Generation
  • Drives External PMOS Switch
  • Contains UVLO Circuit
  • Includes Pulse-by-Pulse Current Limit
  • Low 50uA Sleep Mode Current
  • Simple Single Inductor Flyback PWM for Negative Voltage Generation
  • Drives External PMOS Switch
  • Contains UVLO Circuit
  • Includes Pulse-by-Pulse Current Limit
  • Low 50uA Sleep Mode Current

The UC3572 is a negative output flyback pulse width modulator which converts a positive input voltage to a regulated negative output voltage. The chip is optimized for use in a single inductor negative flyback switching converter employing an external PMOS switch. The block diagram consists of a precision reference, an error amplifier configured for voltage mode operation, an oscillator, a PWM comparator with latching logic, and a 0.5A peak gate driver. The UC3572 includes an undervoltage lockout circuit to insure sufficient input supply voltage is present before any switching activity can occur, and a pulse-by-pulse current limit. Output current can be sensed and limited to a user determined maximum value. The UVLO circuit turns the chip off when the input voltage is below the UVLO threshold. In addition, a sleep comparator interfaces to the UVLO circuit to turn the chip off. This reduces the supply current to only 50uA, making the UC3572 ideal for battery powered applications.

The UC3572 is a negative output flyback pulse width modulator which converts a positive input voltage to a regulated negative output voltage. The chip is optimized for use in a single inductor negative flyback switching converter employing an external PMOS switch. The block diagram consists of a precision reference, an error amplifier configured for voltage mode operation, an oscillator, a PWM comparator with latching logic, and a 0.5A peak gate driver. The UC3572 includes an undervoltage lockout circuit to insure sufficient input supply voltage is present before any switching activity can occur, and a pulse-by-pulse current limit. Output current can be sensed and limited to a user determined maximum value. The UVLO circuit turns the chip off when the input voltage is below the UVLO threshold. In addition, a sleep comparator interfaces to the UVLO circuit to turn the chip off. This reduces the supply current to only 50uA, making the UC3572 ideal for battery powered applications.
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类型 标题 下载最新的英语版本 日期
* 数据表 Negative Output Flyback Pulse Width Modulator 数据表 (Rev. A) 2001年 8月 29日

设计和开发

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封装 引脚 下载
SOIC (D) 8 查看选项
应遵守 TI 评估类商品的标准条款与条件。

订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

支持和培训

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