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UC1875-SP

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Radiation-hardened, QML-V, 20V input, 2A dual-output phase shifted full bridge 2MHz PWM controller

产品详情

Topology Phase-shifted full bridge Control mode Current, Voltage Features Adjustable switching frequency, Error amplifier, Soft start, Sync pin Duty cycle (max) (%) 100
Topology Phase-shifted full bridge Control mode Current, Voltage Features Adjustable switching frequency, Error amplifier, Soft start, Sync pin Duty cycle (max) (%) 100
CFP (W) 24 130.5324 mm² (— mm × — mm) CDIP (J) 20 167.464 mm² (— mm × — mm)
  • QML-V Qualified, SMD 5962-94555
  • Rad-Tolerant: 50 kRad (Si) TID(1)
  • Zero to 100% Duty Cycle Control
  • Programmable Output Turn-On Delay
  • Compatible with Voltage or Current Mode
    Topologies
  • Practical Operation at Switching Frequencies to
    1 MHz
  • Four 2-A Totem Pole Outputs
  • 10-MHz Error Amplifier
  • Undervoltage Lockout (UVLO)
  • Low Startup Current – 150 µA
  • Outputs Active Low During UVLO
  • Soft-Start Control
  • Latched Overcurrent Comparator With Full Cycle
    Restart
  • Trimmed Reference
  • QML-V Qualified, SMD 5962-94555
  • Rad-Tolerant: 50 kRad (Si) TID(1)
  • Zero to 100% Duty Cycle Control
  • Programmable Output Turn-On Delay
  • Compatible with Voltage or Current Mode
    Topologies
  • Practical Operation at Switching Frequencies to
    1 MHz
  • Four 2-A Totem Pole Outputs
  • 10-MHz Error Amplifier
  • Undervoltage Lockout (UVLO)
  • Low Startup Current – 150 µA
  • Outputs Active Low During UVLO
  • Soft-Start Control
  • Latched Overcurrent Comparator With Full Cycle
    Restart
  • Trimmed Reference

The UC1875-SP implements control of a bridge power stage by phase-shifting the switching of one half-bridge with respect to the other, allowing constant frequency pulse-width modulation in combination with resonant, zero-voltage switching for high efficiency performance at high frequencies. This circuit may be configured to provide control in either voltage or current mode operation, with a separate overcurrent shutdown for fast fault protection.

A programmable time delay is provided to insert a dead-time at the turn-on of each output stage. This delay, providing time to allow the resonant switching action, is independently controllable for each output pair (A-B, C-D).

With the oscillator capable of operation at frequencies in excess of 2 MHz, overall switching frequencies to 1 MHz are practical. In addition to the standard free running mode, with the CLOCKSYNC pin, the user may configure these devices to accept an external clock synchronization signal, or may lock together up to 5 units with the operational frequency determined by the fastest device.

Protective features include an undervoltage lockout which maintains all outputs in an active-low state until the supply reaches a 10.75-V threshold. 1.5 hysteresis is built in for reliable, boot-strapped chip supply. Overcurrent protection is provided, and will latch the outputs in the OFF state within 70 ns of a fault. The current-fault circuitry implements full-cycle restart operation.

Additional features include an error amplifier with bandwidth in excess of 7 MHz, a 5-V reference, provisions for soft-starting, and flexible ramp generation and slope compensation circuitry.

This device is available in hermetically sealed cerdip, surface mount, and ceramic leadless chip carrier packages for –55°C to 125°C operation.

The UC1875-SP implements control of a bridge power stage by phase-shifting the switching of one half-bridge with respect to the other, allowing constant frequency pulse-width modulation in combination with resonant, zero-voltage switching for high efficiency performance at high frequencies. This circuit may be configured to provide control in either voltage or current mode operation, with a separate overcurrent shutdown for fast fault protection.

A programmable time delay is provided to insert a dead-time at the turn-on of each output stage. This delay, providing time to allow the resonant switching action, is independently controllable for each output pair (A-B, C-D).

With the oscillator capable of operation at frequencies in excess of 2 MHz, overall switching frequencies to 1 MHz are practical. In addition to the standard free running mode, with the CLOCKSYNC pin, the user may configure these devices to accept an external clock synchronization signal, or may lock together up to 5 units with the operational frequency determined by the fastest device.

Protective features include an undervoltage lockout which maintains all outputs in an active-low state until the supply reaches a 10.75-V threshold. 1.5 hysteresis is built in for reliable, boot-strapped chip supply. Overcurrent protection is provided, and will latch the outputs in the OFF state within 70 ns of a fault. The current-fault circuitry implements full-cycle restart operation.

Additional features include an error amplifier with bandwidth in excess of 7 MHz, a 5-V reference, provisions for soft-starting, and flexible ramp generation and slope compensation circuitry.

This device is available in hermetically sealed cerdip, surface mount, and ceramic leadless chip carrier packages for –55°C to 125°C operation.

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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 UC1875-SP Rad-Tolerant Class-V, Phase Shift Resonant Controller 数据表 (Rev. B) PDF | HTML 2015-12-31
* 辐射与可靠性报告 UC1875-SP Neutron Displacement Damage (NDD) Characterization Report 2021-10-29
* 辐射与可靠性报告 UC1875‐SP TID Report 2015-3-31
* SMD UC1875-SP SMD 5962-94555 2016-7-8
选择指南 TI Space Products (Rev. L) 2026-3-27
应用手册 气密性封装回流焊曲线、端接镀层以及引线裁切与成型 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2025-11-20
应用简报 经 DLA 批准的 QML 产品优化 (Rev. C) PDF | HTML 英语版 (Rev.C) PDF | HTML 2025-8-18
应用手册 重离子轨道环境单粒子效应估算 (Rev. B) PDF | HTML 英语版 (Rev.B) PDF | HTML 2025-7-7
更多文献资料 TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B) 2025-2-20
应用手册 QML flow, its importance, and obtaining lot information (Rev. C) 2023-8-30
应用手册 单粒子效应置信区间计算 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2022-12-2
电子书 电子产品辐射手册 2022-5-7
应用简报 Controlling Input Power for Present and Next-Generation Power Controllers PDF | HTML 2020-12-14
应用手册 DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer 2020-8-21
应用手册 Phase Shifted Full Bridge, Zero Voltage Transition Design Considerations (Rev. A) 2011-1-22
更多文献资料 Seminar 800 Topic 5 - Fixed-Frequency Resonant-Switched PWM 2001-2-15
更多文献资料 Seminar 900 Topic 3 - Designing a Phase-Shifted ZVT Power Converter 2001-2-15
更多文献资料 Seminar 900 Topic 4 - 500-W 40-W/in3 Phase-Shifted ZVT Power Converter 2001-2-15

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封装 引脚 CAD 符号、封装和 3D 模型
CFP (W) 24 Ultra Librarian
CDIP (J) 20 Ultra Librarian

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