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Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 5 Protocols Analog Ron (typ) (Ω) 3 CON (typ) (pF) 100 Supply current (typ) (µA) 10 Bandwidth (MHz) 25 Operating temperature range (°C) -40 to 85 Features Supports input voltage beyond supply Input/output continuous current (max) (mA) 100 Rating Catalog Drain supply voltage (max) (V) 5.25 Supply voltage (max) (V) 5.25
Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 5 Protocols Analog Ron (typ) (Ω) 3 CON (typ) (pF) 100 Supply current (typ) (µA) 10 Bandwidth (MHz) 25 Operating temperature range (°C) -40 to 85 Features Supports input voltage beyond supply Input/output continuous current (max) (mA) 100 Rating Catalog Drain supply voltage (max) (V) 5.25 Supply voltage (max) (V) 5.25
SSOP (DBQ) 16 29.4 mm² 4.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 3 Typ)
  • 0- to 10-V Switching on Data I/O Ports
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 20 pF Max, B Port)
  • VCC Operating Range From 4.75 V to 5.25 V
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: PCI Interface, Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

  • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 3 Typ)
  • 0- to 10-V Switching on Data I/O Ports
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 20 pF Max, B Port)
  • VCC Operating Range From 4.75 V to 5.25 V
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: PCI Interface, Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

The TS5N214 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distorion on the data bus. Specifically designed to support high-bandwidth applications, the TS5N214 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The TS5N214 is a 2-bit 1-of-4 multiplexer/demultiplexer with separate output-enable (1OE, 2OE) inputs. The select (S0, S1) inputs control the data path of the multiplexer/demultiplexer. When OE is low, the multiplexer/demultiplexer is enabled and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the multiplexer/demultiplexer is disabled and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The TS5N214 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distorion on the data bus. Specifically designed to support high-bandwidth applications, the TS5N214 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The TS5N214 is a 2-bit 1-of-4 multiplexer/demultiplexer with separate output-enable (1OE, 2OE) inputs. The select (S0, S1) inputs control the data path of the multiplexer/demultiplexer. When OE is low, the multiplexer/demultiplexer is enabled and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the multiplexer/demultiplexer is disabled and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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类型 项目标题 下载最新的英语版本 日期
* 数据表 TS5N214 数据表 2005年 7月 28日
应用手册 选择正确的德州仪器 (TI) 信号开关 (Rev. E) PDF | HTML 下载英文版本 (Rev.E) PDF | HTML 2022年 8月 5日
应用手册 多路复用器和信号开关词汇表 (Rev. B) 下载英文版本 (Rev.B) PDF | HTML 2022年 3月 11日
应用手册 防止模拟开关的额外功耗 下载英文版本 2008年 7月 15日
应用手册 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日

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封装 引脚数 下载
SSOP (DBQ) 16 了解详情
TSSOP (PW) 16 了解详情

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