产品详情

Frequency (max) (MHz) 1936 Frequency (min) (MHz) 1805 Normalized PLL phase noise (dBc/Hz) -137 Features Integer N PLL, Integrated VCO Current consumption (mA) 130 Integrated VCO Yes Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) >350
Frequency (max) (MHz) 1936 Frequency (min) (MHz) 1805 Normalized PLL phase noise (dBc/Hz) -137 Features Integer N PLL, Integrated VCO Current consumption (mA) 130 Integrated VCO Yes Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) >350
VQFN (RHA) 40 36 mm² (6 mm × 6 mm)
  • Fully Integrated VCO
  • Low Phase Noise: –137dBc/Hz (at 600kHz, fVCO
    of 1.9GHz)
  • Low Noise Floor: –158dBc/Hz at 10MHz Offset
  • Integer-N PLL
  • Input Reference Frequency range: 10MHz to
    104MHz
  • VCO Frequency Divided by 2-4 Output
  • Output Buffer Enable Pin
  • Programmable Charge Pump Current
  • Hardware and Software Power Down
  • 3-Wire Serial Interface
  • Single Supply: 4.5V to 5.25V Operation
  • Fully Integrated VCO
  • Low Phase Noise: –137dBc/Hz (at 600kHz, fVCO
    of 1.9GHz)
  • Low Noise Floor: –158dBc/Hz at 10MHz Offset
  • Integer-N PLL
  • Input Reference Frequency range: 10MHz to
    104MHz
  • VCO Frequency Divided by 2-4 Output
  • Output Buffer Enable Pin
  • Programmable Charge Pump Current
  • Hardware and Software Power Down
  • 3-Wire Serial Interface
  • Single Supply: 4.5V to 5.25V Operation

TRF3761 is a family of high performance, highly integrated frequency synthesizers, optimized for high performance applications. The TRF3761 includes a low-noise, voltage-controlled oscillator (VCO) and an integer-N PLL.

TRF3761 integrates divide-by 1, 2, or 4 options for a more flexible output frequency range. It is controlled through a 3-wire serial-programming-interface (SPI) interface. For power sensitive applications the TRF3761 can be powered down by the SPI interface or externally via chip_en pin 2.

TRF3761 is a family of high performance, highly integrated frequency synthesizers, optimized for high performance applications. The TRF3761 includes a low-noise, voltage-controlled oscillator (VCO) and an integer-N PLL.

TRF3761 integrates divide-by 1, 2, or 4 options for a more flexible output frequency range. It is controlled through a 3-wire serial-programming-interface (SPI) interface. For power sensitive applications the TRF3761 can be powered down by the SPI interface or externally via chip_en pin 2.

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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 TRF3761-x Integer-N PLL with Integrated VCO 数据表 (Rev. K) PDF | HTML 2015-12-31
应用手册 TRF3761 QFN Installation Using a Hakko Hot Air Rework Station 2007-4-7
应用手册 Fractional/Integer-N PLL Basics 1998-5-13

设计与开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

评估模块 (EVM) 用 GUI

SLWC102 — TRF3761EVM Software Package

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计算工具

RF-CASCADE-CALC-TOOL — TI 射频级联计算器

A browser-based RF lineup analysis tool supporting up to 10 stages. Computes gain, NF, OIP3, OIP2, OP1dB, and derived metrics. Features dual-axis Plotly charts, P1dB saturation detection, and export to CSV
支持的产品和硬件
计算工具

TRF3761CALC — TRF3761 Loop Filter Calculator

TRF3761CALC is a loop filter design tool for the TRF3761 PLL Frequency Synthesizer with integrated VCO.

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封装 引脚 CAD 符号、封装和 3D 模型
VQFN (RHA) 40 Ultra Librarian

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