产品详细信息

Number of ADC channels 1 Number of DAC channels (#) 1 Digital audio interface L, R, I2S, DSP Analog inputs 3 Sampling rate (Max) (kHz) 96 Rating Catalog ADC SNR (Typ) (dB) 90 DAC SNR (Typ) (dB) 100
Number of ADC channels 1 Number of DAC channels (#) 1 Digital audio interface L, R, I2S, DSP Analog inputs 3 Sampling rate (Max) (kHz) 96 Rating Catalog ADC SNR (Typ) (dB) 90 DAC SNR (Typ) (dB) 100
TSSOP (PW) 28 62 mm² 9.7 x 6.4 VQFN (RHD) 28 25 mm² 5.0 x 5.0
  • High-Performance Stereo Codec
    • 90-dB SNR Multibit Sigma-Delta ADC (A-weighted at 48 kHz)
    • 100-dB SNR Multibit Sigma-Delta DAC (A-weighted at 48 kHz)
    • 1.42 V – 3.6 V Core Digital Supply: Compatible With TI C54x DSP Core Voltages
    • 2.7 V – 3.6 V Buffer and Analog Supply: Compatible Both TI C54x DSP Buffer Voltages
    • 8-kHz – 96-kHz Sampling-Frequency Support
  • Software Control Via TI McBSP-Compatible Multiprotocol Serial Port
    • 2-wire-Compatible and SPI-Compatible Serial-Port Protocols
    • Glueless Interface to TI McBSPs
  • Audio-Data Input/Output Via TI McBSP-Compatible Programmable Audio Interface
    • I2S-Compatible Interface Requiring Only One McBSP for both ADC and DAC
    • Standard I2S, MSB, or LSB Justified-Data Transfers
    • 16/20/24/32-Bit Word Lengths
    • Audio Master/Slave Timing Capability Optimized for TI DSPs (250/272 fs), USB mode
    • Industry-Standard Master/Slave Support Provided Also (256/384 fs), Normal mode
    • Glueless Interface to TI McBSPs
  • Integrated Total Electret-Microphone Biasing and Buffering Solution
    • Low-Noise MICBIAS pin at 3/4 AVDD for Biasing of Electret Capsules
    • Integrated Buffer Amplifier With Tunable Fixed Gain of 1 to 5
    • Additional Control-Register Selectable Buffer Gain of 0 dB or 20 dB
  • Stereo-Line Inputs
    • Integrated Programmable Gain Amplifier
    • Analog Bypass Path of Codec
  • ADC Multiplexed Input for Stereo-Line Inputs and Microphone
  • Stereo-Line Outputs
    • Analog Stereo Mixer for DAC and Analog Bypass Path
  • Volume Control With Mute on Input and Output
  • Highly Efficient Linear Headphone Amplifier
    • 30 mW into 32 From a 3.3-V Analog Supply Voltage
  • Flexible Power Management Under Total Software Control
    • 23-mW Power Consumption During Playback Mode
    • Standby Power Consumption <150 µW
    • Power-Down Power Consumption &lt15 µW
  • Industry’s Smallest Package: 32-Pin TI Proprietary MicroStar Junior™
    • 25 mm2 Total Board Area
    • 28-Pin TSSOP Also Is Available (62 mm2 Total Board Area)
  • Ideally Suitable for Portable Solid-State Audio Players and Recorders

MicroStar Junior is a trademark of Texas Instruments.

  • High-Performance Stereo Codec
    • 90-dB SNR Multibit Sigma-Delta ADC (A-weighted at 48 kHz)
    • 100-dB SNR Multibit Sigma-Delta DAC (A-weighted at 48 kHz)
    • 1.42 V – 3.6 V Core Digital Supply: Compatible With TI C54x DSP Core Voltages
    • 2.7 V – 3.6 V Buffer and Analog Supply: Compatible Both TI C54x DSP Buffer Voltages
    • 8-kHz – 96-kHz Sampling-Frequency Support
  • Software Control Via TI McBSP-Compatible Multiprotocol Serial Port
    • 2-wire-Compatible and SPI-Compatible Serial-Port Protocols
    • Glueless Interface to TI McBSPs
  • Audio-Data Input/Output Via TI McBSP-Compatible Programmable Audio Interface
    • I2S-Compatible Interface Requiring Only One McBSP for both ADC and DAC
    • Standard I2S, MSB, or LSB Justified-Data Transfers
    • 16/20/24/32-Bit Word Lengths
    • Audio Master/Slave Timing Capability Optimized for TI DSPs (250/272 fs), USB mode
    • Industry-Standard Master/Slave Support Provided Also (256/384 fs), Normal mode
    • Glueless Interface to TI McBSPs
  • Integrated Total Electret-Microphone Biasing and Buffering Solution
    • Low-Noise MICBIAS pin at 3/4 AVDD for Biasing of Electret Capsules
    • Integrated Buffer Amplifier With Tunable Fixed Gain of 1 to 5
    • Additional Control-Register Selectable Buffer Gain of 0 dB or 20 dB
  • Stereo-Line Inputs
    • Integrated Programmable Gain Amplifier
    • Analog Bypass Path of Codec
  • ADC Multiplexed Input for Stereo-Line Inputs and Microphone
  • Stereo-Line Outputs
    • Analog Stereo Mixer for DAC and Analog Bypass Path
  • Volume Control With Mute on Input and Output
  • Highly Efficient Linear Headphone Amplifier
    • 30 mW into 32 From a 3.3-V Analog Supply Voltage
  • Flexible Power Management Under Total Software Control
    • 23-mW Power Consumption During Playback Mode
    • Standby Power Consumption <150 µW
    • Power-Down Power Consumption &lt15 µW
  • Industry’s Smallest Package: 32-Pin TI Proprietary MicroStar Junior™
    • 25 mm2 Total Board Area
    • 28-Pin TSSOP Also Is Available (62 mm2 Total Board Area)
  • Ideally Suitable for Portable Solid-State Audio Players and Recorders

MicroStar Junior is a trademark of Texas Instruments.

The TLV320AIC23B is a high-performance stereo audio codec with highly integrated analog functionality. The analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) within the TLV320AIC23B use multibit sigma-delta technology with integrated oversampling digital interpolation filters. Data-transfer word lengths of 16, 20, 24, and 32 bits, with sample rates from 8 kHz to 96 kHz, are supported. The ADC sigma-delta modulator features third-order multibit architecture with up to 90-dBA signal-to-noise ratio (SNR) at audio sampling rates up to 96 kHz, enabling high-fidelity audio recording in a compact, power-saving design. The DAC sigma-delta modulator features a second-order multibit architecture with up to 100-dBA SNR at audio sampling rates up to 96 kHz, enabling high-quality digital audio-playback capability, while consuming less than 23 mW during playback only. The TLV320AIC23B is the ideal analog input/output (I/O) choice for portable digital audio-player and recorder applications, such as MP3 digital audio players.

Integrated analog features consist of stereo-line inputs with an analog bypass path, a stereo headphone amplifier, with analog volume control and mute, and a complete electret-microphone-capsule biasing and buffering solution. The headphone amplifier is capable of delivering 30 mW per channel into 32 . The analog bypass path allows use of the stereo-line inputs and the headphone amplifier with analog volume control, while completely bypassing the codec, thus enabling further design flexibility, such as integrated FM tuners. A microphone bias-voltage output provides a low-noise current source for electret-capsule biasing. The AIC23B has an integrated adjustable microphone amplifier (gain adjustable from 1 to 5) and a programmable gain microphone amplifier (0 dB or 20 dB). The microphone signal can be mixed with the output signals if a sidetone is required.

While the TLV320AIC23B supports the industry-standard oversampling rates of 256 fs and 384 fs, unique oversampling rates of 250 fs and 272 fs are provided, which optimize interface considerations in designs using TI C54x digital signal processors (DSPs) and universal serial bus (USB) data interfaces. A single 12-MHz crystal can supply clocking to the DSP, USB, and codec. The TLV320AIC23B features an internal oscillator that, when connected to a 12-MHz external crystal, provides a system clock to the DSP and other peripherals at either 12 MHz or 6 MHz, using an internal clock buffer and selectable divider. Audio sample rates of 48 kHz and compact-disc (CD) standard 44.1 kHz are supported directly from a 12-MHz master clock with 250 fs and 272 fs oversampling rates.

Low power consumption and flexible power management allow selective shutdown of codec functions, thus extending battery life in portable applications. This design solution, coupled with the industry’s smallest package, the TI proprietary MicroStar Junior™ using only 25 mm2 of board area, makes powerful portable stereo audio designs easily realizable in a cost-effective, space-saving total analog I/O solution: the TLV320AIC23B.

The TLV320AIC23B is a high-performance stereo audio codec with highly integrated analog functionality. The analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) within the TLV320AIC23B use multibit sigma-delta technology with integrated oversampling digital interpolation filters. Data-transfer word lengths of 16, 20, 24, and 32 bits, with sample rates from 8 kHz to 96 kHz, are supported. The ADC sigma-delta modulator features third-order multibit architecture with up to 90-dBA signal-to-noise ratio (SNR) at audio sampling rates up to 96 kHz, enabling high-fidelity audio recording in a compact, power-saving design. The DAC sigma-delta modulator features a second-order multibit architecture with up to 100-dBA SNR at audio sampling rates up to 96 kHz, enabling high-quality digital audio-playback capability, while consuming less than 23 mW during playback only. The TLV320AIC23B is the ideal analog input/output (I/O) choice for portable digital audio-player and recorder applications, such as MP3 digital audio players.

Integrated analog features consist of stereo-line inputs with an analog bypass path, a stereo headphone amplifier, with analog volume control and mute, and a complete electret-microphone-capsule biasing and buffering solution. The headphone amplifier is capable of delivering 30 mW per channel into 32 . The analog bypass path allows use of the stereo-line inputs and the headphone amplifier with analog volume control, while completely bypassing the codec, thus enabling further design flexibility, such as integrated FM tuners. A microphone bias-voltage output provides a low-noise current source for electret-capsule biasing. The AIC23B has an integrated adjustable microphone amplifier (gain adjustable from 1 to 5) and a programmable gain microphone amplifier (0 dB or 20 dB). The microphone signal can be mixed with the output signals if a sidetone is required.

While the TLV320AIC23B supports the industry-standard oversampling rates of 256 fs and 384 fs, unique oversampling rates of 250 fs and 272 fs are provided, which optimize interface considerations in designs using TI C54x digital signal processors (DSPs) and universal serial bus (USB) data interfaces. A single 12-MHz crystal can supply clocking to the DSP, USB, and codec. The TLV320AIC23B features an internal oscillator that, when connected to a 12-MHz external crystal, provides a system clock to the DSP and other peripherals at either 12 MHz or 6 MHz, using an internal clock buffer and selectable divider. Audio sample rates of 48 kHz and compact-disc (CD) standard 44.1 kHz are supported directly from a 12-MHz master clock with 250 fs and 272 fs oversampling rates.

Low power consumption and flexible power management allow selective shutdown of codec functions, thus extending battery life in portable applications. This design solution, coupled with the industry’s smallest package, the TI proprietary MicroStar Junior™ using only 25 mm2 of board area, makes powerful portable stereo audio designs easily realizable in a cost-effective, space-saving total analog I/O solution: the TLV320AIC23B.

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TLV320AIC3104 正在供货 具有 6 个输入、6 个输出、耳机放大器和增强数字效果的低功耗立体声编解码器 TI recommends it because of comparable price and better features like integrated PLL, additional input/outputs, programmable filters and support for two mics

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类型 标题 下载最新的英文版本 日期
* 数据表 Stereo Audio CODEC,, 8-to 96-KHz, With Integrated Headphone Amplifier 数据表 (Rev. H) 2004年 2月 12日
应用手册 Dynamic Behavior of TLV320DAC23 and TLV320AIC23B (Rev. A) 2020年 6月 22日
应用手册 Out-of-Band Noise Measurement Issues for Audio Codecs (Rev. A) 2019年 12月 31日
应用手册 Audio Serial Interface Configurations for Audio Codecs (Rev. A) 2019年 6月 27日
应用手册 Using the MSP430 Launchpad as a Standalone I2C Host for Audio Products (Rev. A) 2013年 10月 28日
应用手册 Audio Serial Interface Configurations for Audio Codecs 2010年 9月 22日
应用手册 Solving Enumeration Errors in USB Audio DAC and CODEC Designs 2009年 10月 30日
应用手册 Configuring I2S to Generate BCLK from Codec Devices and WCLK from McBSP Port 2009年 7月 8日
应用手册 CSL - 1 Application Report 2008年 8月 4日
应用手册 Common Sample Rate Selection For TLV320AIC12/13/14/15/20/21/24/25 Codecs 2003年 4月 30日
应用手册 TLV320AIC12/13/14/15 CODEC Operating Under Stand-Alone Slave Mode 2002年 5月 16日

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TLV320AIC23B IBIS Model (Rev. A)

SBAC052A.ZIP (14 KB) - IBIS Model
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TSSOP (PW) 28 了解详情
VQFN (RHD) 28 了解详情

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