产品详情

Technology family LVC Number of channels 2 Operating temperature range (°C) -40 to 85 Rating Catalog Supply current (max) (µA) 40
Technology family LVC Number of channels 2 Operating temperature range (°C) -40 to 85 Rating Catalog Supply current (max) (µA) 40
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) SOP (NS) 16 79.56 mm² (10.2 mm × 7.8 mm) VQFN (RGY) 16 14 mm² (4 mm × 3.5 mm) TVSOP (DGV) 16 23.04 mm² (3.6 mm × 6.4 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm) SSOP (DB) 16 48.36 mm² (6.2 mm × 7.8 mm)
  • Operates From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 6.2 ns
  • Typical VOLP (Output Ground Bounce)
       <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
       >2 V at VCC = 3.3 V, TA = 25°C
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

  • Operates From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 6.2 ns
  • Typical VOLP (Output Ground Bounce)
       <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
       >2 V at VCC = 3.3 V, TA = 25°C
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

This dual 2-line to 4-line decoder/demultiplexer is designed for 1.65-V to 3.6-V VCC operation.

The device comprises two individual 2-line to 4-line decoders in a single package. The active-low enable (G)\ input can be used as a data line in demultiplexing applications. This decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its driving circuit.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.

This dual 2-line to 4-line decoder/demultiplexer is designed for 1.65-V to 3.6-V VCC operation.

The device comprises two individual 2-line to 4-line decoders in a single package. The active-low enable (G)\ input can be used as a data line in demultiplexing applications. This decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its driving circuit.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.

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* 数据表 SN74LVC139A 数据表 (Rev. O) 2003-10-2

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评估板

14-24-LOGIC-EVM — 采用 14 引脚至 24 引脚 D、DB、DGV、DW、DYY、NS 和 PW 封装的逻辑产品通用评估模块

14-24-LOGIC-EVM 评估模块 (EVM) 设计用于支持采用 14 引脚至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。

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评估板

14-24-NL-LOGIC-EVM — 采用 14 引脚至 24 引脚无引线封装的逻辑产品通用评估模块

14-24-EVM 是一款灵活的评估模块 (EVM),旨在支持具有 14 引脚至 24 引脚 BQA、BQB、RGY、RSV、RJW 或 RHL 封装的任何逻辑或转换器件。

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仿真模型

SN74LVC139A IBIS Model

SCEM267.ZIP (35 KB) - IBIS 模型
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
TSSOP (PW) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian
VQFN (RGY) 16 Ultra Librarian
TVSOP (DGV) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
SSOP (DB) 16 Ultra Librarian

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