封装信息
| 封装 | 引脚 DSBGA (YZP) | 8 |
| 工作温度范围 (°C) -40 to 85 |
| 包装数量 | 包装 3,000 | LARGE T&R |
SN74AUC2G02 的特性
- Available in the Texas Instruments NanoFree™ Package
- Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- Ioff Supports Partial Power-Down-Mode Operation
- Sub-1-V Operable
- Max tpd of 1.8 ns at 1.8 V
- Low Power Consumption, 10 µA at 1.8 V
- ±8-mA Output Drive at 1.8 V
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
NanoFree is a trademark of Texas Instruments.
SN74AUC2G02 的说明
This dual 2-input positive-NOR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUC2G02 performs the Boolean function Y = A + B or Y = A • B in positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.