SN74AUC17
- Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- Ioff Supports Partial-Power-Down Mode Operation
- Sub-1-V Operable
- Max tpd of 1.8 ns at 1.8 V
- Low Power Consumption, 10-µA Max ICC
- ±8-mA Output Drive at 1.8 V
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
This hex Schmitt-trigger buffer is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUC17 contains six independent buffers and performs the Boolean function Y = A. The device functions as six independent buffers, but because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negative-going (VT-) signals.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
技术文档
未找到结果。请清除搜索,并重试。
查看全部 20 设计和开发
如需其他信息或资源,请查看下方列表,点击标题即可进入详情页面。
评估板
14-24-NL-LOGIC-EVM — 通用 14 至 24 引脚无铅封装评估模块
Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.
参考设计
TIDA-00106 — 为实现高电压共模抑制而进行隔离的 16 位、1MSPS 数据采集参考设计
该电路实现了用于处理输入信号(高达 ±12V)的高性能数据采集 (DAQ) 解决方案,该信号叠加在相对于系统主电源接地电位的较大共模偏移(经测试高达 155 Vp-p,从直流到约 15 kHz)上。通过生成隔离式电源来实现共模抑制,从而允许模拟信号链随着输入共模信号浮动。模拟信号链包含具有集成模拟前端 (AFE) 的高性能 16 位 1 MSPS SAR ADC,该 AFE 可提供高输入阻抗和 ±12V 宽输入电压范围。相关应用领域包括 :具有逐通道隔离的 PLC 模拟输入模块、汽车电池组监控、交流电机驱动器中的电源监控和热电偶测量。
封装 | 引脚数 | 下载 |
---|---|---|
VQFN (RGY) | 14 | 了解详情 |
订购和质量
包含信息:
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 认证摘要
- 持续可靠性监测