封装信息
封装 | 引脚 WQFN (RHS) | 48 |
工作温度范围 (°C) -40 to 85 |
包装数量 | 包装 2,500 | LARGE T&R |
LMK02002 的特性
Target Applications
LMK02002 的说明
The
Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.
The clock conditioner comes in a 48-pin LLP package and is footprint compatible with other clocking devices in the same family.