DS34C86T
- CMOS Design for Low Power
- ±0.2V Sensitivity Over the Input Common Mode Voltage Range
- Typical Propagation Delays: 19 ns
- Typical Input Hysteresis: 60 mV
- Inputs Won't Load Line when VCC = 0V
- Meets the Requirements of EIA Standard RS-422
- TRI-STATE Outputs for System Bus Compatibility
- Available in Surface Mount
- Open Input Failsafe Feature, Output High for Open Input
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The DS34C86T is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS.
The DS34C86T has an input sensitivity of 200 mV over the common mode input voltage range of ±7V. Hysteresis is provided to improve noise margin and discourage output instability for slowly changing input waveforms.
The DS34C86T features internal pull-up and pull-down resistors which prevent output oscillation on unused channels.
Separate enable pins allow independent control of receiver pairs. The TRI-STATE outputs have 6 mA source and sink capability. The DS34C86T is pin compatible with the DS3486.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | DS34C86T Quad CMOS Differential Line Receiver 数据表 (Rev. C) | 2013-4-15 | |||
| 应用手册 | AN-903 A Comparison of Differential Termination Techniques (Rev. B) | 2013-4-26 |
设计与开发
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| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |