CDCVF111
- Low-Output Skew for Clock-Distribution Applications
- Differential Low-Voltage Pseudo-ECL (LVPECL) Compatible Inputs and Outputs
- Distributes Differential Clock Inputs to Nine Differential Clock Outputs
- Output Reference Voltage (VREF) Allows Distribution From a Single-Ended Clock Input
- Packaged In a 28-Pin Plastic Chip Carrier
The differential LVPECL clock-driver circuit distributes one pair of differential LVPECL clock inputs (CLKIN, CLKIN)\ to nine pairs of differential clock (Y, Y)\ outputs with minimum skew for clock distribution. It is specifically designed for driving 50- transmission lines.
The VREF output can be strapped to the CLKIN\ input for a single-ended CLKIN input.
The CDCVF111 is characterized for operation from 40°C to 85°C.
技术文档
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查看全部 1 类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | 1:9 Differential LVPECL Clock Driver 数据表 (Rev. B) | 2002年 6月 7日 |
订购和质量
包含信息:
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
包含信息:
- 制造厂地点
- 封装厂地点