SPVA065
June 2026
TIC12400-Q1
1
Abstract
Trademarks
1
Introduction
2
On-Chip ADC Front-End Architecture Overview
3
Understanding the ILKG Specification in the Datasheet
3.1
Interpretation of the ±110 µA Specification
3.2
The Leakage Current Is MUX-Activated and Time-Limited
4
Design Considerations with Weak Voltage Sources
4.1
Definition of a Weak Voltage Source
4.2
Mechanism of the Sampling Spike
5
Quantitative Model and Error Estimation
5.1
Voltage Step During the Sampling Window
5.2
Steady-State Offset with High-Impedance Sources
6
Design Mitigation Methods
6.1
Method 1: Strengthen the Voltage Source
6.2
Method 2: External RC Compensation (Recommended)
6.3
Method 3: Static Offset Calibration
7
Summary
8
References
Application Note
Understanding ADC Input Leakage and Sampling Behavior in TIC12400-Q1