When an INx channel is selected by the internal MUX, the internal voltage divider and ADC front-end circuitry are suddenly connected to the INx pin. During the sampling window (T_adc or T_comp), a leakage current up to the I_LKG bound is injected into the total capacitance present at the INx node. This total capacitance (C_IN) includes the parasitic capacitance of the PCB trace and the TIC12400-Q1 pin, as well as any external filter capacitor intentionally added to the node. At the end of the sampling window, the MUX disconnects the internal front-end, and the stored charge discharges through the external source impedance (R_EXT) back toward the steady-state voltage defined by the external network. Figure 4 shows the resulting narrow voltage spikes measured at the INx pin across multiple polling cycles.

Because the leakage current injection occurs consistently at each polling event and the R_EXT × C_IN discharge time constant can be long relative to the polling interval, the INx node may not fully recover to its steady-state voltage before the next sampling event. This leads to a quasi-static DC offset superimposed on the true input voltage.