This application report highlights board design recommendations when using the AM335x family of devices. The recommendations are intended to supplement the information provided in the device-specific technical reference manual and data sheet. It is not an all-encompassing list, but rather a succinct reference for board designers that highlights certain caveats and care-abouts related to different use cases.
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This application report applies to the AM335x family of devices listed on the AM335x Cortex-A8 Overview. On this overview page are links to TI hardware designs based on AM335x.
For more information, see the device-specific product pages that contain up-to-date information and resources, including application reports and user's guides to facilitate schematic and board design.
Signals on interfaces that are unused can typically be left as no connect. Many of the IOs have a Pad Control Register that provides control over the input capabilities of the I/O (RXACTIVE field in each conf_<module>_<pin> register). For more details, see the Control Module chapter of the AM335x and AMIC110 Sitara™ Processors Technical Reference Manual. In initialization, software should disable the I/Os that are no connects (RXACTIVE=0) as soon as possible. This RXACTIVE field defaults to "input active" for most signals, which means there is a potential for some leakage during powerup of the chip if the input floats to a mid-supply level before the software can initialize the I/O. This should only be a concern if you are attempting to power up the design with a minimum power consumption. Most designs should be able to tolerate this small amount of leakage in each floating I/O until the software has a change to disable it. After disabling the I/O, no leakage will occur.
ROM code depends on SYSBOOT configuration pins to determine the boot device order, boot configuration, and crystal frequency available on the board. These SYSBOOT pins are sampled only once on the rising edge of PWRONRSTn/PORz release and the Control Module register CONTROL_STATUS will reflect the configuration values as sampled. All 16 pins on SYSBOOT[15:0] must be terminated high or low and cannot be left floating. The desired high or low logic levels should be present at the pins before PORz is released to ensure correct sampling. For more information, see the Device Control and Status and Initialization chapters in the AM335x and AMIC110 Sitara™ Processors Technical Reference Manual.