ZHCSQS0E
August 2006 – January 2024
TPS5410
PRODUCTION DATA
1
1
特性
2
应用
3
说明
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Oscillator Frequency
6.3.2
Voltage Reference
6.3.3
Enable (ENA) and Internal Slow-Start
6.3.4
Undervoltage Lockout (UVLO)
6.3.5
Boost Capacitor (BOOT)
6.3.6
Output Feedback (VSENSE)
6.3.7
Internal Compensation
6.3.8
Voltage Feed-Forward
6.3.9
Pulse-Width-Modulation (PWM) Control
6.3.10
Overcurrent Limiting
6.3.11
Overvoltage Protection
6.3.12
Thermal Shutdown
6.4
Device Functional Modes
6.4.1
Minimum Input Voltage
6.4.2
ENA Control
7
Applications and Implementation
7.1
Application Information
7.2
Typical Applications
7.2.1
Application Circuit
7.2.1.1
Design Requirements
7.2.1.2
Detailed Design Procedure
7.2.1.2.1
Switching Frequency
7.2.1.2.2
Input Capacitors
7.2.1.2.3
Output Filter Components
7.2.1.2.3.1
Inductor Selection
7.2.1.2.3.2
Capacitor Selection
7.2.1.2.4
Output Voltage Setpoint
7.2.1.2.5
Boot Capacitor
7.2.1.2.6
Catch Diode
7.2.1.2.7
Advanced Information
7.2.1.2.7.1
Output Voltage Limitations
7.2.1.2.7.2
Internal Compensation Network
7.2.1.2.7.3
Thermal Calculations
7.2.1.3
Application Curves
7.2.2
Using All Ceramic Capacitors
7.2.2.1
Design Requirements
7.2.2.2
Detailed Design Procedure
7.2.2.2.1
Output Filter Capacitor Selection
7.2.2.2.2
External Compensation Network
7.2.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Related Documentation
8.2
接收文档更新通知
8.3
支持资源
8.4
Trademarks
8.5
静电放电警告
8.6
术语表
9
Revision History
10
Mechanical, Packaging, and Orderable Information
7.4.2
Layout Example
Figure 7-17
Design Layout
Figure 7-18
TPS5410 Land Pattern