ZHCSKT7C february   2020  – june 2022

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 功能方框图
  6. 5 Revision History
  7. 6 Device Comparison
    1. 6.1 Related Products
  8. 7 Terminal Configuration and Functions
    1. 7.1 Pin Diagram
    2. 7.2 Signal Descriptions
  9. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Power-On Hours (POH)
    4. 8.4 Recommended Operating Conditions
    5. 8.5 Power Supply Specifications
    6. 8.6 Power Consumption Summary
    7. 8.7 RF Specification
    8. 8.8 Thermal Resistance Characteristics for FCBGA Package [ABL0161]
    9. 8.9 Timing and Switching Characteristics
      1. 8.9.1 Power Supply Sequencing and Reset Timing
      2. 8.9.2 Synchronized Frame Triggering
      3. 8.9.3 Input Clocks and Oscillators
        1. 8.9.3.1 Clock Specifications
      4. 8.9.4 Multibuffered / Standard Serial Peripheral Interface (MibSPI)
        1. 8.9.4.1 Peripheral Description
          1. 8.9.4.1.1 SPI Timing Conditions
          2. 8.9.4.1.2 SPI Peripheral Mode Switching Parameters (SPICLK = input, SPISIMO = input, and SPISOMI = output)
          3. 8.9.4.1.3 SPI Peripheral Mode Timing Requirements (SPICLK = input, SPISIMO = input, and SPISOMI = output)
        2. 8.9.4.2 Typical Interface Protocol Diagram (Peripheral Mode)
      5. 8.9.5 Inter-Integrated Circuit Interface (I2C)
        1. 8.9.5.1 I2C Timing Requirements
      6. 8.9.6 LVDS Interface Configuration
        1. 8.9.6.1 LVDS Interface Timings
      7. 8.9.7 General-Purpose Input/Output
        1. 8.9.7.1 Switching Characteristics for Output Timing versus Load Capacitance (CL)
      8. 8.9.8 Camera Serial Interface (CSI)
        1. 8.9.8.1 CSI Switching Characteristics
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Subsystems
      1. 9.3.1 RF and Analog Subsystem
        1. 9.3.1.1 Clock Subsystem
        2. 9.3.1.2 Transmit Subsystem
        3. 9.3.1.3 Receive Subsystem
      2. 9.3.2 Host Interface
    4. 9.4 Other Subsystems
      1. 9.4.1 ADC Data Format Over CSI2 Interface
      2. 9.4.2 ADC Channels (Service) for User Application
        1. 9.4.2.1 GPADC Parameters
  11. 10Monitoring and Diagnostic Mechanisms
  12. 11Applications, Implementation, and Layout
    1. 11.1 Application Information
    2. 11.2 Short-, Medium-, and Long-Range Radar
    3. 11.3 Imaging Radar using Cascade Configuration
    4. 11.4 Reference Schematic
  13. 12Device and Documentation Support
    1. 12.1 Device Nomenclature
    2. 12.2 Tools and Software
    3. 12.3 Documentation Support
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 静电放电警告
    7. 12.7 Export Control Notice
    8. 12.8 术语表
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Packaging Information

3 说明

AWR2243 器件是一款能够在 76GHz 至 81GHz 频带内运行的集成式单芯片 FMCW 收发器。该器件采用极小的封装实现了前所未有的集成度。AWR2243 是适用于汽车领域中低功耗、自监控、超精确雷达系统的理想解决方案。

AWR2243 器件是一种自包含 FMCW 收发器单芯片解决方案，简化了汽车雷达传感器在 76GHz 至 81GHz 频带范围内的实施。它基于 TI 的低功耗 45nm RFCMOS 工艺构建，从而实现了一个具有内置 PLL 和 ADC 转换器的单片实施 3TX、4RX 系统。简单编程模型更改可支持各种传感器实施（近距离、中距离和远距离），并且能够进行动态重新配置，从而实现多模式传感器。此外，该器件作为完整的平台解决方案进行提供，该解决方案包括硬件参考设计、软件驱动程序、样例配置、API 指南以及用户文档。

器件信息
器件型号(1)封装封装尺寸
AWR2243ABGABLQ1（托盘）FCBGA (161)10.4mm × 10.4mm
AWR2243ABGABLRQ1（卷）FCBGA (161)10.4mm × 10.4mm
(1) 有关更多信息，请参阅 节 13、机械、封装和可订购信息。