ZHCSHI1H january   2018  – november 2020 CC1312R

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Functional Block Diagram
  5. Revision History
  6. Device Comparison
  7. Terminal Configuration and Functions
    1. 7.1 Pin Diagram – RGZ Package (Top View)
    2. 7.2 Signal Descriptions – RGZ Package
    3. 7.3 Connections for Unused Pins and Modules
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Power Supply and Modules
    5. 8.5  Power Consumption - Power Modes
    6. 8.6  Power Consumption - Radio Modes
    7. 8.7  Nonvolatile (Flash) Memory Characteristics
    8. 8.8  Thermal Resistance Characteristics
    9. 8.9  RF Frequency Bands
    10. 8.10 861 MHz to 1054 MHz - Receive (RX)
    11. 8.11 861 MHz to 1054 MHz - Transmit (TX) 
    12. 8.12 861 MHz to 1054 MHz - PLL Phase Noise Wideband Mode
    13. 8.13 861 MHz to 1054 MHz - PLL Phase Noise Narrowband Mode
    14. 8.14 359 MHz to 527 MHz - Receive (RX)
    15. 8.15 359 MHz to 527 MHz - Transmit (TX) 
    16. 8.16 359 MHz to 527 MHz - PLL Phase Noise
    17. 8.17 143 MHz to 176 MHz - Receive (RX)
    18. 8.18 143 MHz to 176 MHz  - Transmit (TX) 
    19. 8.19 143 MHz to 176 MHz - PLL Phase Noise
    20. 8.20 Timing and Switching Characteristics
      1. 8.20.1 Reset Timing
      2. 8.20.2 Wakeup Timing
      3. 8.20.3 Clock Specifications
        1. 8.20.3.1 48 MHz Clock Input (TCXO)
        2. 8.20.3.2 48 MHz Crystal Oscillator (XOSC_HF)
        3. 8.20.3.3 48 MHz RC Oscillator (RCOSC_HF)
        4. 8.20.3.4 2 MHz RC Oscillator (RCOSC_MF)
        5. 8.20.3.5 32.768 kHz Crystal Oscillator (XOSC_LF)
        6. 8.20.3.6 32 kHz RC Oscillator (RCOSC_LF)
      4. 8.20.4 Synchronous Serial Interface (SSI) Characteristics
        1. 8.20.4.1 Synchronous Serial Interface (SSI) Characteristics
        2.       43
      5. 8.20.5 UART
        1. 8.20.5.1 UART Characteristics
    21. 8.21 Peripheral Characteristics
      1. 8.21.1 ADC
        1. 8.21.1.1 Analog-to-Digital Converter (ADC) Characteristics
      2. 8.21.2 DAC
        1. 8.21.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 8.21.3 Temperature and Battery Monitor
        1. 8.21.3.1 Temperature Sensor
        2. 8.21.3.2 Battery Monitor
      4. 8.21.4 Comparators
        1. 8.21.4.1 Low-Power Clocked Comparator
        2. 8.21.4.2 Continuous Time Comparator
      5. 8.21.5 Current Source
        1. 8.21.5.1 Programmable Current Source
      6. 8.21.6 GPIO
        1. 8.21.6.1 GPIO DC Characteristics
    22. 8.22 Typical Characteristics
      1. 8.22.1 MCU Current
      2. 8.22.2 RX Current
      3. 8.22.3 TX Current
      4. 8.22.4 RX Performance
      5. 8.22.5 TX Performance
      6. 8.22.6 ADC Performance
  9. Detailed Description
    1. 9.1  Overview
    2. 9.2  System CPU
    3. 9.3  Radio (RF Core)
      1. 9.3.1 Proprietary Radio Formats
    4. 9.4  Memory
    5. 9.5  Sensor Controller
    6. 9.6  Cryptography
    7. 9.7  Timers
    8. 9.8  Serial Peripherals and I/O
    9. 9.9  Battery and Temperature Monitor
    10. 9.10 µDMA
    11. 9.11 Debug
    12. 9.12 Power Management
    13. 9.13 Clock Systems
    14. 9.14 Network Processor
  10. 10Application, Implementation, and Layout
    1. 10.1 Reference Designs
    2. 10.2 Junction Temperature Calculation
  11. 11Device and Documentation Support
    1. 11.1 Tools and Software
      1. 11.1.1 SimpleLink™ Microcontroller Platform
    2. 11.2 Documentation Support
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Packaging Information

359 MHz to 527 MHz - Transmit (TX) 

When measured on the LAUNCHXL-CC1352P-4 reference design with Tc = 25 °C, VDDS = 3.0 V with
DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path.
All measurements are performed conducted. (1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
General parameters
Max output power 433.92 MHz, without BOOST (VDDR = 1.7 V) 13 dBm
Output power programmable range 433.92 MHz, without BOOST (VDDR = 1.7 V) 24 dB
Output power variation over temperature
+13 dBm setting. 433.92 MHz
Over recommended temperature operating range
±1.5 dB
Spurious emissions and harmonics
Spurious emissions (excluding harmonics) (2) 30 MHz to 1 GHz +10 dBm setting
ETSI restricted bands
< -54 dBm
+10 dBm setting
ETSI outside restricted bands
< -36 dBm
1 GHz to 12.75 GHz
(outside ETSI restricted bands)
+10 dBm setting
measured in 1 MHz bandwidth (ETSI)
< -30 dBm
Spurious emissions out-of-band, 429 MHz (2) Outside the necessary requency band
(ARIB T-67)
+10 dBm setting < -26 dBm
710 MHz to 900 MHz
(ARIB T-67)
+10 dBm setting < -55 dBm
900 MHz to 915 MHz
(ARIB T-67)
+10 dBm setting < -55 dBm
930 MHz to 1000 MHz
(ARIB T-67)
+10 dBm setting < -55 dBm
1000 MHz to 1215 MHz
(ARIB T-67)
+10 dBm setting < -45 dBm
Above 1215 MHz
(ARIB T-67)
+10 dBm setting < -30 dBm
Harmonics Second harmonic +13 dBm setting, 433 MHz < -36 dBm
Harmonics Third harmonic +13 dBm setting, 433 MHz < -30 dBm
Harmonics Fourth harmonic +13 dBm setting, 433 MHz < -30 dBm
Harmonics Fifth harmonic +13 dBm setting, 433 MHz < -30 dBm
Some combinations of frequency, data rate and modulation format requires use of external crystal load capacitors for regulatory compliance. More details can be found in the device errata.
Suitable for systems targeting compliance with EN 300 220, EN 303 131, EN 303 204, FCC CFR47 Part 15, ARIB STD-T108.