DATA SHEET
CC1312R SimpleLink™ 高性能 Sub-1GHz 无线 MCU
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1 特性
- 微控制器
- 功能强大的 48MHz Arm® Cortex®-M4F 处理器
- EEMBC CoreMark® 评分：148
- 352KB 系统内可编程闪存
- 256KB ROM，用于协议和库函数
- 8KB 缓存 SRAM（也可作为通用 RAM 提供）
- 80KB 超低泄漏 SRAM。SRAM 通过奇偶校验得到保护，从而确保高度可靠运行。
- 2 引脚 cJTAG 和 JTAG 调试
- 支持无线 (OTA) 升级
- 具有 4KB SRAM 的超低功耗传感器控制器
- 采样、存储和处理传感器数据
- 独立于系统 CPU 运行
- 快速唤醒进入低功耗运行
- TI-RTOS、驱动程序、引导加载程序和 IEEE 802.15.4 MAC 嵌入在 ROM 中，优化了应用尺寸
- 符合 RoHS 标准的封装
- 7mm × 7mm RGZ VQFN48（30 个 GPIO）
- 外设
- 数字外设可连接至任何 GPIO
- 4 个 32 位或 8 个 16 位通用计时器
- 12 位 ADC、200ksps、8 通道
- 2 个具有内部基准 DAC 的比较器
（1 个连续时间比较器、1 个超低功耗比较器） - 可编程电流源
- 2 个异步收发器 (UART)
- 2 个同步串行接口 (SSI)（SPI、MICROWIRE 和 TI）
- I2C
- I2S
- 实时时钟 (RTC)
- AES 128 位和 256 位加密加速计
- ECC 和 RSA 公钥硬件加速器
- SHA2 加速器（包括至 SHA-512 的全套装）
- 真随机数发生器 (TRNG)
- 电容式检测，最多 8 通道
- 集成温度和电池监控器
- 外部系统
- 片上降压直流/直流转换器
- TCXO 支持
- 低功耗
- 宽电源电压范围：1.8V 至 3.8V
- 有源模式 RX：5.8mA（3.6V，868MHz）
- 有源模式 TX (+14dBm)：24.9mA (868MHz)
- 有源模式 MCU 48MHz (CoreMark)：
2.9 mA (60μA/MHz) - 传感器控制器（低功耗模式、2MHz、运行无限环路）：30.1μA
- 传感器控制器，有源模式，24MHz，运行无限循环：808μA
- 待机：0.85μA（RTC 运行，80KB RAM 和 CPU 保持）
- 关断电流：150nA（发生外部事件时唤醒）
- 无线电部分
- 灵活的高性能 Sub-1GHz 射频收发器
- 出色的接收器灵敏度：
SimpleLink 远距离模式下为 -121dBm，
50kbps 时为 -110dBm - 高达 +14dBm 的输出功率，具有温度补偿
- 适用于符合各项全球射频规范的系统
- ETSI EN 300 220 接收器类别 1.5 和 2、EN 303 131、EN 303 204（欧洲）
- FCC CFR47 第 15 部分
- ARIB STD-T108
- 支持广泛的标准
- 无线协议
- IEEE 802.15.4g、支持 IPv6 的智能对象 (6LoWPAN)、MIOTY®、无线 M-Bus、Wi-SUN®、KNX RF、Amazon Sidewalk、专有系统、SimpleLink™ TI 15.4 stack（Sub-1GHz），以及动态多协议管理器 (DMM) 驱动程序
- 开发工具和软件
- CC1312R LaunchPad™ 开发套件
- SimpleLink™ CC13x2 和 CC26x2 软件开发套件 (SDK)
- 用于简单无线电配置的 SmartRF™ Studio
- 用于构建低功耗检测应用的 Sensor Controller Studio
2 应用
- 169、433、470 至 510、868 和 902 至 928MHz
ISM 和 SRD 系统，(1)
接收带宽低至 4kHz - 楼宇自动化
- 楼宇安防系统 – 运动检测器、电子智能锁、门窗传感器、车库门系统、网关
- HVAC – 恒温器、无线环境传感器、HVAC 系统控制器、网关
- 防火安全系统 – 烟雾和热量探测器、火警控制面板 (FACP)
- 视频监控 – IP 网络摄像头
- 升降机和自动扶梯 – 升降机和自动扶梯的电梯主控板
- 电网基础设施
- 工业运输 – 资产跟踪
- 工厂自动化和控制
- 医疗
- 电子销售终端 (EPOS) – 电子货架标签 (ESL)
- 个人电子产品
1. 请参阅射频内核，了解有关支持的协议标准、调制格式和数据速率的其他详细信息。
3 说明
SimpleLink™ CC1312R 器件是一款多协议 Sub-1GHz 无线微控制器 (MCU)，支持 IEEE 802.15.4g、支持 IPv6 的智能对象 (6LoWPAN)、MIOTY®、Wi-SUN®、专有系统（包括 Sub-1GHz 的 TI 15.4-Stack）。该器件经过优化，可用于楼宇安防系统、HVAC、智能仪表、医疗、有线网络、便携式电子产品、家庭影院和娱乐以及联网外设市场中的低功耗无线通信和高级检测。该器件的突出特性包括：
- 灵活的低于 1GHz 无线电，支持业界通用频带（315MHz、433MHz、868MHz、900MHz 等），可满足工业需求。
- 包含完整 SimpleLink™ 15.4-Stack (Sub-1GHz) 解决方案的 SimpleLink™ CC13x2 和 CC26x2 软件开发套件 (SDK) 提供丰富灵活的协议栈支持。
- 对于 Sub-1GHz，最大发送功率为 +14dBm（电流消耗为 24.9mA）。
- 具有 0.85µA 的低待机电流（完全 RAM 保持），从而延长无线应用的电池寿命。
- 支持工业温度，在 105°C 下最低待机电流为 11µA。
- 通过具有快速唤醒功能的可编程、自主式超低功耗传感器控制器 CPU 实现高级检测。例如，传感器控制器能够在 1µA 系统电流下进行 1Hz ADC 采样。
- 低 SER（软错误率）FIT（时基故障），可延长运行寿命，不会对工业市场造成干扰，SRAM 奇偶校验功能始终开启，可防止潜在辐射事件导致的损坏。
- 软件控制的专用无线电控制器 (Arm® Cortex®-M0) 提供灵活的低功耗射频收发器功能，支持多个物理层和射频标准。
- 出色的无线电敏感度 (-121dBm) 和稳健性（选择性与阻断）性能，适用于 SimpleLink™ 远距离模式。
CC1312R 器件是 SimpleLink™ MCU 平台的一部分，该平台包括
Wi-Fi®、低功耗蓝牙、Thread、Zigbee、Sub-1GHz MCU 和主机 MCU，它们共用一个通用、易于使用的开发环境，其中包含单核软件开发套件 (SDK) 和丰富的工具集。借助一次性集成的 SimpleLink™ 平台，可以将产品组合中的任何器件组合添加至您的设计中，从而在设计要求变更时实现 100% 的代码重用。如需更多信息，请访问 SimpleLink™ MCU 平台。
器件信息
| 器件型号(1) | 封装 | 封装尺寸（标称值） |
|---|---|---|
| CC1312R1F3RGZ | VQFN (48) | 7.00mm × 7.00mm |
4 Functional Block Diagram
Figure 4-1 CC1312R Block Diagram5 Revision History
Changes from May 19, 2020 to November 18, 2020 (from Revision G (May 2020) to Revision H (November 2020))
- 更新了整个文档中的表格、图和交叉参考的编号格式Go
- 向节 1，特性 的“无线协议”列表项中添加了 Amazon SidewalkGo
- 向节 1，特性 添加了 TCXO 支持Go
- 向节 2，应用 添加了169MHz 频段Go
- Changed the test condition to "Zero cycles" for the Flash sector erase time parameter in Section 8.7, Nonvolatile (Flash) Memory Characteristics Go
- Added the 169 MHz band in Section 8.9, RF Frequency Bands Go
- Changed the name of "802.15.4g Mandatory Mode" to "IEEE 802.15.4" and added deviation to conditions in Section 8.10, 861 MHz to 1054 MHz - Receive (RX) Go
- Added the following sections to Section 8.10, 861 MHz to 1054 MHz - Receive (RX): 100 kbps, ±25 kHz deviation, 2-GFSK, 137 kHz RX Bandwidth; 200 kbps, ±50 kHz deviation, 2-GFSK, 311 kHz RX Bandwidth; 500 kbps, ±190 kHz deviation, 2-GFSK, 1150 kHz RX Bandwidth; OOK, 4.8 kbps; Narrowband, 9.6 kbps ±2.4 kHz deviation, 2-GFSK, 868 MHz, 17.1 kHz RX Bandwidth; 1 Mbps, ±350 kHz deviation, 2-GFSK, 2.2 MHz RX Bandwidth; Wi-SUN; WB-DSSS, 240/120/60/30 kbps (480 ksym/s, 2-GFSK, ±195 kHz Deviation, FEC (Half Rate), DSSS = 1/2/4/8, 622 kHz RX BW)Go
- Added the Adjacent Channel Power and Alternate Channel Power parameters to Section 8.11, 861 MHz to 1054 MHz - Receive (TX) Go
- Added the OOK 4.8 kbps section to Section 8.14, 359 MHz to 527 MHz - Receive (RX) Go
- Added 143 MHz to 176 MHz band specifications: Section 8.17, Section 8.18, and Section 8.19 Go
- Added Section 8.20.3.1, 48 MHz Clock Input (TCXO) Go
- Changed the frequency of the input tone for 14-bit and 15-bit mode in Section 8.21.1.1 Go
- Updated Figure 8-17; added Figure 8-18, Figure 8-19, and Figure 8-20 Go
- Added the TXCO option in the paragraph that begins "The 48 MHz SCLK_HF is used as…" in Section 9.13, Clock Systems Go
- Added the paragraph that begins "Integrated matched filter-balun devices can be used…" in Section 10.1, Reference Designs Go
6 Device Comparison
Table 6-1 Device Family Overview
| DEVICE | RADIO SUPPORT | FLASH (KB) |
RAM (KB) |
GPIO | PACKAGE SIZE |
|---|---|---|---|---|---|
| CC1312R | Sub-1 GHz | 352 | 80 | 30 | RGZ (7-mm × 7-mm VQFN48) |
| CC1352P | Multiprotocol Sub-1 GHz Bluetooth 5.1 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats +20-dBm high-power amplifier |
352 | 80 | 26 | RGZ (7-mm × 7-mm VQFN48) |
| CC1352R | Multiprotocol Sub-1 GHz Bluetooth 5.1 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats |
352 | 80 | 28 | RGZ (7-mm × 7-mm VQFN48) |
| CC2642R | Bluetooth 5.1 Low Energy 2.4 GHz proprietary FSK-based formats |
352 | 80 | 31 | RGZ (7-mm × 7-mm VQFN48) |
| CC2642R-Q1 | Bluetooth 5.1 Low Energy | 352 | 80 | 31 | RTC (7-mm × 7-mm VQFN48) |
| CC2652R | Multiprotocol Bluetooth 5.1 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats |
352 | 80 | 31 | RGZ (7-mm × 7-mm VQFN48) |
| CC2652RB | Multiprotocol Bluetooth 5.1 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats |
352 | 80 | 31 | RGZ (7-mm × 7-mm VQFN48) |
| CC2652P | Multiprotocol Bluetooth 5.1 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats +19.5-dBm high-power amplifier |
352 | 80 | 26 | RGZ (7-mm × 7-mm VQFN48) |
| CC1310 | Sub-1 GHz | 32–128 | 16–20 | 10–31 | RGZ (7-mm × 7-mm VQFN48) RHB (5-mm × 5-mm VQFN32) RSM (4-mm × 4-mm VQFN32) |
| CC1350 | Sub-1 GHz Bluetooth 4.2 Low Energy |
128 | 20 | 10–31 | RGZ (7-mm × 7-mm VQFN48) RHB (5-mm × 5-mm VQFN32) RSM (4-mm × 4-mm VQFN32) |
| CC2640R2F | Bluetooth 5.1 Low Energy 2.4 GHz proprietary FSK-based formats |
128 | 20 | 10–31 | RGZ (7-mm × 7-mm VQFN48) RHB (5-mm × 5-mm VQFN32) RSM (4-mm × 4-mm VQFN32) YFV (2.7-mm × 2.7-mm DSBGA34) |
| CC2640R2F-Q1 | Bluetooth 5.1 Low Energy 2.4 GHz proprietary FSK-based formats |
128 | 20 | 31 | RGZ (7-mm × 7-mm VQFN48) |
7 Terminal Configuration and Functions
7.1 Pin Diagram – RGZ Package (Top View)
Figure 7-1 RGZ (7-mm × 7-mm) Pinout, 0.5-mm Pitch (Top View)
The following I/O pins marked in Figure 7-1 in bold have high-drive capabilities:
- Pin 10, DIO_5
- Pin 11, DIO_6
- Pin 12, DIO_7
- Pin 24, JTAG_TMSC
- Pin 26, DIO_16
- Pin 27, DIO_17
The following I/O pins marked in Figure 7-1 in italics have analog capabilities:
- Pin 36, DIO_23
- Pin 37, DIO_24
- Pin 38, DIO_25
- Pin 39, DIO_26
- Pin 40, DIO_27
- Pin 41, DIO_28
- Pin 42, DIO_29
- Pin 43, DIO_30
7.2 Signal Descriptions – RGZ Package
Table 7-1 Signal Descriptions – RGZ Package
| PIN | I/O | TYPE | DESCRIPTION | |
|---|---|---|---|---|
| NAME | NO. | |||
| DCDC_SW | 33 | — | Power | Output from internal DC/DC converter(1) |
| DCOUPL | 23 | — | Power | For decoupling of internal 1.27 V regulated digital-supply (2) |
| DIO_1 | 6 | I/O | Digital | GPIO |
| DIO_2 | 7 | I/O | Digital | GPIO |
| DIO_3 | 8 | I/O | Digital | GPIO |
| DIO_4 | 9 | I/O | Digital | GPIO |
| DIO_5 | 10 | I/O | Digital | GPIO, high-drive capability |
| DIO_6 | 11 | I/O | Digital | GPIO, high-drive capability |
| DIO_7 | 12 | I/O | Digital | GPIO, high-drive capability |
| DIO_8 | 14 | I/O | Digital | GPIO |
| DIO_9 | 15 | I/O | Digital | GPIO |
| DIO_10 | 16 | I/O | Digital | GPIO |
| DIO_11 | 17 | I/O | Digital | GPIO |
| DIO_12 | 18 | I/O | Digital | GPIO |
| DIO_13 | 19 | I/O | Digital | GPIO |
| DIO_14 | 20 | I/O | Digital | GPIO |
| DIO_15 | 21 | I/O | Digital | GPIO |
| DIO_16 | 26 | I/O | Digital | GPIO, JTAG_TDO, high-drive capability |
| DIO_17 | 27 | I/O | Digital | GPIO, JTAG_TDI, high-drive capability |
| DIO_18 | 28 | I/O | Digital | GPIO |
| DIO_19 | 29 | I/O | Digital | GPIO |
| DIO_20 | 30 | I/O | Digital | GPIO |
| DIO_21 | 31 | I/O | Digital | GPIO |
| DIO_22 | 32 | I/O | Digital | GPIO |
| DIO_23 | 36 | I/O | Digital or Analog | GPIO, analog capability |
| DIO_24 | 37 | I/O | Digital or Analog | GPIO, analog capability |
| DIO_25 | 38 | I/O | Digital or Analog | GPIO, analog capability |
| DIO_26 | 39 | I/O | Digital or Analog | GPIO, analog capability |
| DIO_27 | 40 | I/O | Digital or Analog | GPIO, analog capability |
| DIO_28 | 41 | I/O | Digital or Analog | GPIO, analog capability |
| DIO_29 | 42 | I/O | Digital or Analog | GPIO, analog capability |
| DIO_30 | 43 | I/O | Digital or Analog | GPIO, analog capability |
| EGP | — | — | GND | Ground – exposed ground pad(3) |
| JTAG_TMSC | 24 | I/O | Digital | JTAG TMSC, high-drive capability |
| JTAG_TCKC | 25 | I | Digital | JTAG TCKC |
| RESET_N | 35 | I | Digital | Reset, active low. No internal pullup resistor |
| RF_P | 1 | — | RF | Positive RF input signal to LNA during RX Positive RF output signal from PA during TX |
| RF_N | 2 | — | RF | Negative RF input signal to LNA during RX Negative RF output signal from PA during TX |
| RX_TX | 3 | — | RF | Optional bias pin for the RF LNA |
| VDDR | 45 | — | Power | Internal supply, must be powered from the internal DC/DC converter or the internal LDO(4)(2)(6) |
| VDDR_RF | 48 | — | Power | Internal supply, must be powered from the internal DC/DC converter or the internal LDO(5)(2)(6) |
| VDDS | 44 | — | Power | 1.8-V to 3.8-V main chip supply(1) |
| VDDS2 | 13 | — | Power | 1.8-V to 3.8-V DIO supply(1) |
| VDDS3 | 22 | — | Power | 1.8-V to 3.8-V DIO supply(1) |
| VDDS_DCDC | 34 | — | Power | 1.8-V to 3.8-V DC/DC converter supply |
| X48M_N | 46 | — | Analog | 48-MHz crystal oscillator pin 1 |
| X48M_P | 47 | — | Analog | 48-MHz crystal oscillator pin 2 |
| X32K_Q1 | 4 | — | Analog | 32-kHz crystal oscillator pin 1 |
| X32K_Q2 | 5 | — | Analog | 32-kHz crystal oscillator pin 2 |
(1) For more details, see technical reference manual listed in Section 11.2.
(2) Do not supply external circuitry from this pin.
(3) EGP is the only ground connection for the device. Good electrical connection to device ground on printed circuit board (PCB) is imperative for proper device operation.
(4) If internal DC/DC converter is not used, this pin is supplied internally from the main LDO.
(5) If internal DC/DC converter is not used, this pin must be connected to VDDR for supply from the main LDO.
(6) Output from internal DC/DC and LDO is trimmed to 1.68 V.
7.3 Connections for Unused Pins and Modules
Table 7-2 Connections for Unused Pins
| FUNCTION | SIGNAL NAME | PIN NUMBER | ACCEPTABLE PRACTICE(1) | PREFERRED PRACTICE(1) |
|---|---|---|---|---|
| GPIO | DIO_n |
6–12 14–21 26–32 36–43 |
NC or GND | NC |
| 32.768-kHz crystal | X32K_Q1 | 4 | NC or GND | NC |
| X32K_Q2 | 5 | |||
| DC/DC converter(2) | DCDC_SW | 33 | NC | NC |
| VDDS_DCDC | 34 | VDDS | VDDS |
(1) NC = No connect
(2) When the DC/DC converter is not used, the inductor between DCDC_SW and VDDR can be removed. VDDR and VDDR_RF must still be connected and the 22 uF DCDC capacitor must be kept on the VDDR net.
8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
(2)
| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| VDDS(3) | Supply voltage | –0.3 | 4.1 | V | |
| Voltage on any digital pin(4) | –0.3 | VDDS + 0.3, max 4.1 | V | ||
| Voltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X48M_N and X48M_P | –0.3 | VDDR + 0.3, max 2.25 | V | ||
| Vin | Voltage on ADC input | Voltage scaling enabled | –0.3 | VDDS | V |
| Voltage scaling disabled, internal reference | –0.3 | 1.49 | |||
| Voltage scaling disabled, VDDS as reference | –0.3 | VDDS / 2.9 | |||
| Input level, RF pins | 10 | dBm | |||
| Tstg | Storage temperature | –40 | 150 | °C | |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to ground, unless otherwise noted.
(3) VDDS_DCDC, VDDS2 and VDDS3 must be at the same potential as VDDS.
(4) Including analog capable DIOs.
8.2 ESD Ratings
| VALUE | UNIT | ||||
|---|---|---|---|---|---|
| VESD | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | All pins | ±2000 | V |
| Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) | All pins | ±500 | V | ||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process
8.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Operating junction temperature(2) | –40 | 105 | °C | |
| Operating supply voltage (VDDS) | 1.8 | 3.8 | V | |
| Operating supply voltage (VDDS), boost mode |
VDDR = 1.95 V +14 dBm RF output power |
2.1 | 3.8 | V |
| Rising supply voltage slew rate | 0 | 100 | mV/µs | |
| Falling supply voltage slew rate(1) | 0 | 20 | mV/µs | |
(1) For small coin-cell batteries, with high worst-case end-of-life equivalent source resistance, a 22-µF VDDS input capacitor
must be used to ensure compliance with this slew rate.
(2) For thermal resistance
characteristics refer to Section 8.8. For application
considerations, refer to Section 10.2.
8.4 Power Supply and Modules
over operating free-air temperature range (unless otherwise noted)
| PARAMETER | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|
| VDDS Power-on-Reset (POR) threshold | 1.1 - 1.55 | V | |||
| VDDS Brown-out Detector (BOD) (1) | Rising threshold | 1.77 | V | ||
| VDDS Brown-out Detector (BOD), before initial boot (2) | Rising threshold | 1.70 | V | ||
| VDDS Brown-out Detector (BOD) (1) | Falling threshold | 1.75 | V |
(1) For boost mode (VDDR =1.95 V), TI drivers software initialization will trim VDDS BOD limits to maximum (approximately 2.0
V)
(2) Brown-out Detector is trimmed at initial boot, value is kept until device is reset by a POR reset or the RESET_N pin
