TIDT262 April   2022

 

  1.   Description
  2.   Features
  3.   Applications
  4. 1Test Prerequisites
    1. 1.1 Voltage and Current Requirements
    2. 1.2 Considerations
    3. 1.3 Dimensions
  5. 2Testing and Results
    1. 2.1 Efficiency Graphs
    2. 2.2 Load Regulation
    3. 2.3 Line Regulation
    4. 2.4 Thermal Images
      1. 2.4.1 Further Extensive Thermal Measurements
        1. 2.4.1.1 No Forced Cooling
          1. 2.4.1.1.1 Thermal Images 4.5 VIN and 20 AOUT
            1. 2.4.1.1.1.1 After 1 Minute of Operation
            2. 2.4.1.1.1.2 After 2 Minutes of Operation
          2. 2.4.1.1.2 Thermal Image 5.5 VIN and 20 AOUT
          3. 2.4.1.1.3 Thermal Image 7 VIN and 25 AOUT
          4. 2.4.1.1.4 Thermal Image 9 VIN and 30 AOUT
          5. 2.4.1.1.5 Thermal Image 12 VIN and 30 AOUT
          6. 2.4.1.1.6 Thermal Image 15 VIN and 30 AOUT
          7. 2.4.1.1.7 Thermal Image 13.8 VIN and 30 AOUT
        2. 2.4.1.2 Forced Cooling
          1. 2.4.1.2.1 Thermal Image 4.5 VIN and 20 AOUT
          2. 2.4.1.2.2 Thermal Image 5.5 VIN and 20 AOUT
          3. 2.4.1.2.3 Thermal Image 7 VIN and 25 AOUT
          4. 2.4.1.2.4 Thermal Image 9 VIN and 30 AOUT
          5. 2.4.1.2.5 Thermal Image 12 VIN and 30 AOUT
          6. 2.4.1.2.6 Thermal Image 15 VIN and 30 AOUT
    5. 2.5 Bode Plots
  6. 3Waveforms
    1. 3.1 Switching
      1. 3.1.1 9-V Input Voltage (Boost Mode)
        1. 3.1.1.1 Boost High Side FETs (Q5, Q6)
          1. 3.1.1.1.1 Source-Drain (Referenced to VOUT')
          2. 3.1.1.1.2 Gate-Source
        2. 3.1.1.2 Boost Low Side (Q7, Q8)
          1. 3.1.1.2.1 Drain-GND
          2. 3.1.1.2.2 Gate-GND
      2. 3.1.2 12-V Input Voltage, Transition Mode, Both Legs Switching at ½ FSW
        1. 3.1.2.1 Boost High Side FETs (Q5, Q6)
          1. 3.1.2.1.1 Source-Drain (Referenced to VOUT')
          2. 3.1.2.1.2 Gate-Source
        2. 3.1.2.2 Boost Low Side (Q7, Q8)
          1. 3.1.2.2.1 Drain-GND
          2. 3.1.2.2.2 Gate-GND
      3. 3.1.3 16-V Input Voltage, Buck Mode
        1. 3.1.3.1 Buck High Side FETs (Q1, Q2)
          1. 3.1.3.1.1 Source-Drain (Referenced to VIN')
          2. 3.1.3.1.2 Gate-Source
        2. 3.1.3.2 Buck Low Side (Q3, Q4)
          1. 3.1.3.2.1 Drain-GND
          2. 3.1.3.2.2 Gate-GND
    2. 3.2 Output Voltage Ripple
    3. 3.3 Input Voltage Ripple
      1. 3.3.1 Power Stage
      2. 3.3.2 Input Terminal, Differential Input Filter Acting
    4. 3.4 Load Transients
      1. 3.4.1 9-V Input Voltage
      2. 3.4.2 12-V Input Voltage
      3. 3.4.3 16-V Input Voltage
    5. 3.5 Start-Up Sequence
      1. 3.5.1 9-V Input Voltage
      2. 3.5.2 12-V Input Voltage
      3. 3.5.3 16-V Input Voltage
    6. 3.6 Shutdown Sequence
      1. 3.6.1 9-V Input Voltage
      2. 3.6.2 12-V Input Voltage
      3. 3.6.3 16-V Input Voltage

1.2 Considerations

WARNING: At cranking level 4.5 V and output current 20 A, the input current will be 60 A. Use a high current source and high current wiring, refer to Board Photo (Top).

This board is built on PMP10214RevA PCB.

Place current-sense resistor R71 beside R7, no backpack is possible; scratch PCB and do not short the via below R71.

Unless otherwise mentioned, the output current was set to 30 A with an electronic load (N3305A).

  • UVLO thresholds
    • ON at 7.7 V
    • Off at 4.1 V
  • Measured switching frequency
    • 193 kHz at buck or boost, 97 kHz at transition (VIN is 11 V to 13 V)
  • Measured output voltage
    • 12.14 V
Table 1-2 Trip Levels Current Sense
Input Voltage Output Current (Maximum)

4.5 V

22 A

5.5 V

27 A

7 V

35 A

9 V

45 A