SWRZ156A December   2024  – December 2025 IWRL6843 , IWRL6844

 

  1.   1
  2. 1Introduction
  3. 2Device Nomenclature
  4. 3Device Markings
  5. 4Advisory to Silicon Variant / Revision Map
  6. 5Known Design Exceptions to Functional Specifications
    1. 5.1 ANA #51
    2. 5.2 ANA #57
    3. 5.3 ANA #65
    4. 5.4 ANA #66
    5. 5.5 DIG #17
  7. 6Trademarks
  8.   Revision History

5.3 ANA #65

Emission at 1.6GHz with default APLL frequency

Revisions Affected

IWRL684x ES1.0

Details

Configurations using frame duty cycle > 25% can have reduced margin for CISPR25 class5 emission compliance at 1.6GHz when using default APLL frequency.

Workaround

The APLL frequency shift option should be used for >25% frame duty cycle. APLL frequency shift can be enabled by setting apllFreqShiftEn configuration value to 1. Refer mmWave demo tuning guide for more details.