SNVA925E January   2020  – March 2024 LM63610-Q1 , LM63615-Q1 , LM63625-Q1

 

  1.   1
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 HTSSOP Package
    2. 2.2 WSON Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 HTSSOP-16 Package
    2. 4.2 WSON Package
  6. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the LM636xx-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality
BNo device damage, but loss of functionality
CNo device damage, but performance degradation
DNo device damage, no impact to functionality or performance

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Device used within the Recommended Operating Conditions and the Absolute Maximum Ratings found in the LM63625 data sheet.
  • Configuration as shown in the Example Application Circuit found in the LM63625 data sheet.