SNIU044A February 2020 – October 2021 LMT86-Q1
3 Pin Failure Mode Analysis (Pin FMA)
This section provides a failure mode analysis (FMA) for the pins of the LMT86-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to ground (see Table 3-2)
- Pin open-circuited (see Table 3-3)
- Pin short-circuited to an adjacent pin (see Table 3-4)
- Pin short-circuited to supply (see Table 3-5)
Table 3-2 through Table 3-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 3-1.
Table 3-1 TI Classification of Failure Effects
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality. |
| B | No device damage, but loss of functionality. |
| C | No device damage, but performance degradation. |
| D | No device damage, no impact to functionality or performance. |
Figure 3-1 shows the SC70 package pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the LMT86-Q1 data sheet.
Figure 3-1 Pin DiagramFollowing are the assumptions of use and the device configuration assumed for the pin FMA in this section:
- Bypass capacitor on the input voltage pin of 0.01 µF.
- Series resistors are sized to limit the input currents to the analog inputs to < 5 mA.
- Capacitive loading on output pin is limited to 1100 pF.
Table 3-2 Pin FMA for Device Pins Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| GND | 1 | No effect. Normal operation. | D |
| GND | 2 | No effect. Normal operation. | D |
| OUT | 3 | Output stuck low. No analog output present on device. | B |
| VDD | 4 | Device unpowered. Device not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. | A |
| VDD | 5 | Expected analog output from device can be altered. | B |
Table 3-3 Pin FMA for Device Pins Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| GND | 1 | Expected analog output from device can be altered. | B |
| GND | 2 | Device functionality undetermined. Device may be unpowered or connect to ground internally through alternate pin ESD diode and power up. | B |
| OUT | 3 | No effect. Normal operation. | D |
| VDD | 4 | Expected analog output from device can be altered. | B |
| VDD | 5 | Expected analog output from device can be altered. | B |
Table 3-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|---|
| GND | 1 | GND | No effect. Normal operation. | D |
| GND | 2 | OUT | Device functionality undetermined. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. | A |
| OUT | 3 | GND | Output stuck low. No analog output present on device. | B |
| VDD | 4 | VDD | No effect. Normal operation. | D |
| VDD | 5 | VDD | No effect. Normal operation. | D |
Table 3-5 Pin FMA for Device Pins Short-Circuited to
Supply
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| GND | 1 | Expected analog output from device can be altered. | B |
| GND | 2 | Device functionality undetermined. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. | A |
| OUT | 3 | Output stuck high. | B |
| VDD | 4 | No effect. Normal operation. | D |
| VDD | 5 | No effect. Normal operation. | D |