SLVUDU7 April   2026 LMG708B0

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
      1. 1.4.1 Application Circuit Diagram
  8. 2Hardware
    1. 2.1 Test Setup and Procedure
      1. 2.1.1 EVM Connections
      2. 2.1.2 Test Equipment
      3. 2.1.3 Recommended Test Setup
        1. 2.1.3.1 Input Connections
        2. 2.1.3.2 Output Connections
      4. 2.1.4 Test Procedure
        1. 2.1.4.1 Line and Load Regulation, Efficiency
  9. 3Implementation Results
    1. 3.1 Test Data and Performance Curves
      1. 3.1.1 Efficiency
      2. 3.1.2 Thermal Performance
      3. 3.1.3 Operating Waveforms
        1. 3.1.3.1 Load Transient Response
        2. 3.1.3.2 Start-Up With VIN
        3. 3.1.3.3 Start-Up and Shutdown With ENABLE On and Off
        4. 3.1.3.4 Switching Operation
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
      1. 4.2.1 Component Drawings
      2. 4.2.2 Layout Guidelines
        1. 4.2.2.1 Power Stage Layout
        2. 4.2.2.2 Small-signal Component Layout
        3. 4.2.2.3 Thermal Design and Layout
        4. 4.2.2.4 Ground Plane Design
    3. 4.3 Bill of Materials
  11. 5Compliance Information
    1. 5.1 Compliance and Certifications
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 Development Support
    2. 7.2 Documentation Support
      1. 7.2.1 Related Documentation
        1. 7.2.1.1 Low-EMI Design Resources
        2. 7.2.1.2 Thermal Design Resources
        3. 7.2.1.3 PCB Layout Resources

4.2.2.4 Ground Plane Design

TI recommends using one or more of the inner PCB layers as a solid ground plane. In particular, a full ground plane on the layer directly underneath the power-stage components is essential. Connect the exposed pads at the base of the LMG708B0 as well as the return terminals of the input and output capacitors to this ground plane. Keep PGND and AGND separate by using a dedicated island for AGND. The PGND nets contain high-frequency noise related to the high-di/dt switching currents. The power traces for VIN, PGND, and SW can be restricted to one side of the ground plane.