SLVUDF8 November   2025 PGA854

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
      1. 1.1.1 Electrostatic Discharge Caution
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
      1. 1.4.1 Hot Surface Warning
  8. 2Hardware
    1. 2.1 Setup and Connections
    2. 2.2 Jumper Settings
    3. 2.3 Power-Supply Connections
    4. 2.4 Analog Input and Output Connections
    5. 2.5 Digital Input Pins and Gain Control
    6. 2.6 Modifications
  9. 3Hardware Design Files
    1. 3.1 PCB Layout
    2. 3.2 Schematic
    3. 3.3 Bill of Materials
  10. 4Additional Information
    1. 4.1 Trademarks
  11. 5Related Documentation

2.3 Power-Supply Connections

The PGA854EVM uses two sets of voltage supplies: input stage and output stage. The device operates using input-stage power supplies from ±4V (8V) to ±18V (36V) and output-stage power supplies from ±2.25V (4.5V) to ±18V (36V). The output-stage supply voltage must not exceed the input-stage supply voltage.

The input-stage power-supply connections for the PGA854EVM are provided through connector J13 at the top of the EVM. The input-stage positive power-supply connection is labeled +VCC, the negative power-supply connection is labeled –VEE, and the ground connection is labeled GND. To connect power to the PGA854EVM, insert wires into each terminal of J13 and then tighten the screws to make the connection.

PGA854EVM Input Stage Power Supply Connector (J13)Figure 2-4 Input Stage Power Supply Connector (J13)

Table 2-4 summarizes the pin definition for supply connector J13 and the allowed voltage range for each supply connection.

Table 2-2 PGA854EVM Supply-Range Specifications
Connector Pin NumberSupply ConnectionVoltage Range
J13.3Input-stage positive supply (+VCC)Single supply, VS = +VCC: 8V to 36V
Dual supply, VS = (+VCC) – (–VEE): 4V to 18V
J13.2Ground0V
J13.1Negative supply (–VEE)Single supply, VS = +VCC: 0V (GND)
Dual supply, VS = (+VCC) – (–VEE): –4V to –18V
J14.1

LVDD+_ext

Single supply, LVDD+_ext: 4.5V to 36V
Dual supply, output stage supply (LVSS+) – (LVSS–): 2.25V to 18V
J14.2Ground0V
J14.3LVSS–_extSingle supply, LVSS–_ext: 0V (GND)
Dual supply, output stage supply (LVSS+) – (LVSS–): –2.25V to –18V
J14.4Ground0V

By default, the output-stage supply-voltage levels (LVDD+ and LVSS-) are set to the PGA854 positive (+VCC) and negative (–VEE) supplies, respectively. The LVDD+ pin is connected to +VCC through jumper J9 1-2, and the –LVSS pin is connected to –VEE through J16 1-2. Screw terminal connector J14 provides access to the output-stage supply pins. To set the voltage level of LVDD and LVSS with an external supply, shunt jumper J9 2-3 to access the LVDD+ using connector J14.1. In a similar fashion, shunt jumper J16 2-3 to access the –LVSS pin using connector J14.3.

PGA854EVM Output Stage Power Supply Connector (J14)Figure 2-5 Output Stage Power Supply Connector (J14)

Figure 2-6 shows the PGA854EVM voltage supply connections.

PGA854EVM PGA854EVM Voltage Supply ConnectionsFigure 2-6 PGA854EVM Voltage Supply Connections