SLVUDC9 December   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Terminology
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Board Setup Out of Box
    2. 2.2 Power Supply Selection
    3. 2.3 Feature Capability and Setup
    4. 2.4 Recommended Setup
  9. 3Additional Information
    1. 3.1 Known Hardware or Software Issues
    2. 3.2 Trademarks
    3. 3.3 Terminology
  10. 4References
  11. 5Revision History

1.4 Device Information

The DP83TD555-Q1 integrates IEEE802.3 Media Access Controller (MAC) and IEEE802.1 AS timestamp enables a variety of microcontrollers with SPI interface to connect to Ethernet networks using 10BASE-T1S bus. The device also integrates IEEE 1588v2/802.1AS to enable accurate time synchronization (< 100 ns ) and hardware time-stamping for various applications.

The DP83TD555-Q1 allows for efficient system-level battery current consumption by supporting TC10 Wake/Sleep requirements. This allows a low-current sleep state in which power is gated to system components by DP83TD555-Q1. When a wake-up even is detected, the DP83TD555-Q1 initiates system start-up by driving INH high. The wide VBAT operation range allows DP83TD555-Q1 to connect to 12 V, 24 V, or 48 V battery systems.

The DP83TD555-Q1 is equipped with diagnostic features such as cable fault detection and undervoltage detection to accelerate root cause analysis.