SLVUCK0 October   2022

 

  1.   TPS61033EVM-105 Evaluation Module
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Performance Specification
    2. 1.2 Modification
    3. 1.3 Input Capacitor
    4. 1.4 Feedforward Capacitor
  4. 2Setup
    1. 2.1 Input/Output Connector Descriptions
  5. 3Schematic and Bill of Materials
    1. 3.1 Schematic
    2. 3.2 Bill of Materials
  6. 4Board Layout

2.1 Input/Output Connector Descriptions

Reference Designator Description
J1-VIN Positive input connection from the input supply for the EVM.
J2-VOUT Positive connection for the output voltage.
J3-GND Return connection from the input supply for the EVM.
J4-GND Return connection for the output voltage.
J5-VIN Input voltage sensing for measuring efficiency. VIN_S+ is for positive input and VIN_S- is for negative input.
J6-VOUT Output voltage sensing for measuring efficiency. VOUT_S+ is for output positive node and VOUT_S- is for output negative node.
J7-PG Test point to measure PG pin waveform.
JP1-MODE MODE pin input jumper. Place a jumper across MODE and VIN to set the device in forced PWM mode. Place a jumper across MODE and GND to set the device in auto PFM mode.
JP2-EN EN pin input jumper. Place a jumper across EN and VIN to turn on the IC. Place a jumper across EN and GND to turn off the IC.
TP1-SW Test point to measure SW pin waveform.