SLVUCJ6 November   2022 LP5890

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Features
    2. 1.2 Applications
  4. 2Function Descriptions
  5. 3Test Setup
    1. 3.1 System/Tool Requirements
    2. 3.2 Software Setup
    3. 3.3 Hardware Setup for Single Device
    4. 3.4 Hardware Setup for Dual Cascaded Devices
  6. 4Additional Resources
  7. 5Schematic
  8. 6Layout
  9. 7Bill of Materials

Layout

The PCB layout of the EVM is shown below.

GUID-20220902-SS0I-45P8-NR7J-JDJXSM8DR9RK-low.gifFigure 6-1 LP5890EVM Top Layer
GUID-20220902-SS0I-SZ2C-WZRM-WJSPZMVP4SDX-low.gifFigure 6-3 LP5890EVM Signal Layer 2
GUID-20220902-SS0I-9H8B-GJGL-LPQ6XKK95RWV-low.gifFigure 6-2 LP5890EVM Signal Layer 1
GUID-20220902-SS0I-LRBG-GQPG-PZD3CP4CCXH7-low.gifFigure 6-4 LP5890EVM Bottom Layer