SLVSAX7E August   2011  – August 2016

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Adjustable Switching Frequency
      2. 8.3.2  Out-of-Phase Operation
      3. 8.3.3  Delayed Start-Up
      4. 8.3.4  Soft-Start Time
      5. 8.3.5  Adjusting the Output Voltage
      6. 8.3.6  Error Amplifier
      7. 8.3.7  Slope Compensation
      8. 8.3.8  Overcurrent Protection
      9. 8.3.9  Thermal Shutdown
      10. 8.3.10 Low Power Mode Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation With Minimum VIN (VIN < 4.45 V)
      2. 8.4.2 Operation With EN Control
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
        4. 9.2.2.4 Bootstrap Capacitor Selection
        5. 9.2.2.5 Loop Compensation
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Power Dissipation
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

5 Description (continued)

The switching frequency of the converters can be set from 300 KHz to 1.4 MHz with an external resistor. Two converters have 180° out-of-phase clock signals to minimize the input filter requirements and alleviate EMI and input capacitor requirements.

TPS65270 also features a light-load pulse skipping mode (PSM). The PSM mode allows a power loss reduction on the input power supplied to the system at light loading in order to achieve light-load high efficiency.

The TPS65270 is available in a 24-pin, thermally enhanced HTSSOP (PWP) package and 24-pin VQFN (RGE) package.