SLVAFZ9 June 2026 TAC5212
When multiple TAC5x1x EVMs are connected to a single I2C bus, each EVM must have a unique I2C address. On TAC5x1x EVMs, the I2C address is set by pullups and pulldowns at header J75, as shown in Figure 4-2. Placement of the jumper in this section, as shown in Table 4-1, controls the I2C address of each TAC5x1x device.
Figure 4-2 I2C Address
Configuration for the TAC5x1x EVM| J75 Position | ADDR Setting | I2C TARGET ADDRESS (BINARY) |
|---|---|---|
| 1 (shown in Figure 4-2) | Short to GND | 1010 000 |
| 2 | Short to AVDD | N/A (SPI) |
| 3 | Pull up 22kΩ to AVDD | 1010 010 |
| 4 | Pull up 4.7kΩ to AVDD | 1010 011 |
| 5 | Pull down 4.7kΩ to GND | 1010 001 |