SLVAF72 September   2021 TPS2661

 

  1.   Trademarks
  2. 1Overview of a HART Enabled Analog Input Module
  3. 2Protection Provided by TPS2661 to Analog Input Module
    1. 2.1 Overload Protection
    2. 2.2 Output Hot Short and Input Hot Plug
    3. 2.3 Miswiring on Input
    4. 2.4 Input Under Voltage Protection
  4. 3Protection Provided by TPS2661 to Analog Output Module (AOM)
    1. 3.1 Miswiring on Output
    2. 3.2 Output under voltage protection
  5. 4HART Tests Done on TPS2661x
  6. 5Challenges Using Discrete Solution Instead of TPS2661x

Overview of a HART Enabled Analog Input Module

A PLC uses a HART enabled analog input module (AIM) to communicate with the field device in real-time. A HART enabled analog input module consists of an ADC and sense resistor to measure the analog current, and a HART modem to modulate and demodulate the HART data. The HART communication protocol is a master/slave communication scheme. The input module acts as the master and sends requests for data to the slave transmitter or field device. The slave transmitter regulates the loop current and transmits HART as AC coupled 1mApp sinusoidal waveform over the DC current loop that is converted to a voltage signal by the burden resistor and demodulated by the HART modem at the analog input module. When the analog input module transmits HART, it directly couples the voltage signal to the burden resistor, creating a HART voltage waveform that is demodulated by the HART modem in the field device.

Figure 1-1 shows a simplified circuit diagram of a HART enabled analog input module. When the current flows across the load resistor, R1, a proportional voltage is induced across R1. This voltage is equal to the loop current multiplied by the load resistance. The ADC samples and converts this voltage into a digital value that can be read by a microcontroller. R2 and C1 form a simple low-pass filter to remove out-of band noise present at the ADC input. C2 and C3 isolate the DC from the modem input and output to the high side of the load resistor.

Figure 1-1 Analog Input Module with HART