SLVAF13 November   2020 LM5069 , TPS1663 , TPS2663

 

  1.   Trademarks
  2. 1Introduction
  3. 2Parallel Configuration
  4. 3Design Example
    1. 3.1 Design Requirements
    2. 3.2 Detailed Design Procedure
    3. 3.3 Performance Results
  5. 4Comparison With the Hot-Swap and ORing Controller Solution
  6. 5TPS16630 Parallel Circuit Configuration
  7. 6Conclusion
  8. 7References

4 Comparison With the Hot-Swap and ORing Controller Solution

In this section, various performance parameters are compared between the eFuse solution and the traditional hot-swap and ORing controllers-based solution for the design specifications tabulated in Table 3-1. Figure 4-1 shows the block diagram of the traditional solution, which uses an LM5069 hot-swap controller with an external FET for inrush current limit, overload, short-circuit, and overvoltage protections and a LM5050 ORing controller with external FET for reverse-current blocking. For more information on the implementation and results of the traditional solution, see the 24-V DC,10-A eFuse and Protection Circuit for Programmable Logic Controllers (PLC) Design Guide.
Figure 4-1 Block Diagram of Hot-Swap and ORing Controllers Based Solution

Table 4-1 details the comparison between the solutions.

Table 4-1 Comparison Between the Solutions
Parameter LM5069 and LM5050 Based Solution TPS2663 Parallel Configuration Comments
Input voltage range 9 V to 80 V, 100 V absolute maximum 4.5 V to 60 V, 67 V absolute maximum Higher absolute maximum voltage rating of LM5069 and LM5050 provides flexibility in high voltage applications.
Driving large capacitive loads Yes, using dv/dt soft-start circuit at the GATE
of LM5069

Yes

 The thermal regulation loop in the TPS2663 helps to charge unknown capacitive loads as detailed in the Reliable Startup with Large and Unknown Capactive Loads Application Report.
MOSFET SOA protection Yes, through the internal FET power-limiting scheme Yes, through the internal thermal regulation loop and overtemperature protection Integration offers accurate FET temperature measurement and reliable protection. External FET solution with the LM5069 always overdesigned to account “factor of safety” for FET SOA.
Current limiting (accuracy %) Yes, (±11.8%) Yes, (±7%) Better current limit accuracy with the TPS2663 helps to optimize the input supply size or rating
Current monitoring No Analog current monitor output with ±6%
Surge protection Provides only Class-B system performance The fast recovery feature in the TPS2663 helps to achieve Class-A system performance The LM5069 solution requires large capacitance at the output to buffer the load during surge, power interruptions for meeting Class-A system performance
Supply line transients Supply line transients cause false trips and often needs trade-off between immunity and short-circuit response The smart control scheme in the TPS2663 distinguishes real faults from system transients and provides immunity to the transients
Fault status No Yes Fault status output helps to monitor the system status

No. of components

ICs: LM5069, LM5050

Hot-swap FET: CSD19502Q5B
(SON 5 mm × 6 mm)

ORing FETs: 2 × CSD19532Q5B
(SON 5 mm × 6 mm)

RSENSE: 2 mΩ, 1.5 W
(6.3 mm × 3 mm)

COUT: 7 × 2.2 mF,
35 V (diameter 16 mm)

ICs: 4 × TPS26631
(4 mm × 4 mm)

ORing FETs:
2 × CSD19532Q5B
(SON 5 mm × 6 mm)

COUT: 3 × 1 mF,
35 V (diameter 16 mm)

 Only the critical space occupying components are considered. The LM5069 solution requires large output capacitance to meet Class-A system performance.
Solution size 2924 mm2 1323 mm2

55% reduction in solution size