SLUUAS2C October   2013  – November 2021

 

  1.   Trademarks
  2. 1 Introduction
  3. 2 Description
    1. 2.1 Typical Applications
    2. 2.2 Features
  4. 3 Electrical Performance Specifications
  5. 4 Schematic
  6. 5 Test Setup
    1. 5.1 Test Equipment
    2. 5.2 Recommended Test Setup
  7. 6 Configurations
    1. 6.1 PMBus Address Selection
    2. 6.2 Mode Selection
    3. 6.3 VDD Pin Supply Selection
  8. 7 Test Procedure
    1. 7.1 Line and Load Regulation and Efficiency Measurement Procedure
    2. 7.2 PMBUS Setup and Verification
    3. 7.3 Control-Loop Gain and Phase-Measurement Procedure
    4. 7.4 List of Test Points
    5. 7.5 Equipment Shutdown
  9. 8 EVM Assembly Drawing and PCB Layout
  10. 9 Bill of Materials
  11. 10Revision History

8 EVM Assembly Drawing and PCB Layout

The following figures show the design of the TPS53915EVM-PWR587 printed circuit board (see Figure 8-1 through Figure 8-8). The EVM has been designed using a six-layer 2-oz copper-circuit board.

GUID-78890969-A2BD-4C56-B866-E1C0CFDD8FDE-low.gifFigure 8-1 TPS53915EVM-587 Top-Layer Assembly Drawing
GUID-2CFAC718-59C7-43BC-BA6D-CB66453EC542-low.gifFigure 8-2 TPS53915EVM-587 Bottom-Layer Assembly Drawing
GUID-4AC43F28-0473-432D-A3DE-055F632AE75F-low.gifFigure 8-3 TPS53915EVM-587 Top Layer, Copper
GUID-C39022BC-0140-486D-9C25-9F1EF6B69446-low.gifFigure 8-4 TPS53915EVM-587 Layer Two, Copper
GUID-C95D02AF-D4FD-49C4-82AA-20BD57CC2CCB-low.gifFigure 8-5 TPS53915EVM-587 Layer Three, Copper
GUID-7D3CDE21-4972-460F-AAAF-3FC4577495FE-low.gifFigure 8-6 TPS53915EVM-587 Layer Four, Copper
GUID-3B6BF547-93E5-4673-95B9-61CEFE85793F-low.gifFigure 8-7 TPS53915EVM-587 Layer Five, Copper
GUID-BB999A40-7477-4D11-A251-A61E518BB9ED-low.gifFigure 8-8 TPS53915EVM-587 Bottom Layer, Copper