SLLA591 June   2022 TDP1204

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2General Configuration Pin
  6. 3Transmitter Configuration
  7. 4Receiver Configuration
  8.   References

3 Transmitter Configuration

AC_EN: In pin-strap mode, the AC pin selects between AC-coupled or DC-coupled transmitter

Table 3-1 AC_EN Pin Setting
AC_EN Description
0 DC-coupled
1 AC-coupled

TXPRE: The TDP1204 provides pre-emphasis/de-emphasis on the data lanes allowing the output signal pre-conditioning to offset interconnect losses between the TDP1204 outputs and a TMDS receiver. Pre-emphasis/de-emphasis is not implemented on the clock lane unless the TDP1204 is in HDMI 2.1 FRL mode and at which time the clock lane becomes a data lane. There are two methods to implement pre-emphasis, pin strapping or through I2C programming. TX pre-emphasis and de-emphasis control is only supported in limited mode.

When using pin-strap mode, the TXPRE pin controls four different global pre-emphasis/de-emphasis values for all data lanes when TDP1204 is operating in HDMI 1.4 or HDMI 2.0. In HDMI 2.1 FRL mode, the TXPRE pin has no effect and the de-emphasis value used is based on the DDC TXFFE snooped value.

Table 3-2 TXPRE Pin Setting
TXPRE HDMI1.4
Or 2.0		 HDMI2.1 TXFFE Level
0 3.5 dB pre-emphasis Refer to TXFFE Level
R –2.5 dB de-emphasis Refer to TXFFE Level
F 0 dB Refer to TXFFE Level
1 6 dB pre-emphasis Refer to TXFFE Level
FRL TX FFE Level De-emphasis (dB)
TXFFE0 -2.5
TXFFE1 -3.5
TXFFE2 -3.7
TXFFE3 -4.6

TXSWG: The TDP1204 transmitter swing level can be adjusted in both pin-strap and I2C mode.

In I2C mode, TX swing settings are controlled independently for each lane (both clock and data) through registers. In pin strap mode with limited mode enabled, the TXSWG pin adjust the default 1000 mV swing. These settings apply only to the data lanes. The clock lane remains at default value. In pin-strap mode with linear enabled, the linearity range is fixed at the highest level (1200mVpp) so TXSWG pin is not used.

Table 3-3 TXSWG Pin Setting
TXSWG Limited Mode Linear Mode
0 Default + 10% 1200 mVpp
R Default-5% 1200 mVpp
F Default (1000 mVpp) 1200 mVpp
1 Default + 15% 1200 mVpp