SLLA515 November   2020 SN6501-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOT-23 (5) Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOT-23 (5) Package

Failure Mode Distribution (FMD)

The failure mode distribution estimation for SN6501-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.

Table 3-1 Die Failure Modes and Distribution
Die Failure ModesFailure Mode Distribution (%)
D1 and/or D2 FET stuck off48%
D1 and/or D2 FET stuck ON38%
D1 and/or D2 output not in timing or voltage specification12%
D1 and/or D2 output undetermined2%