SLLA515 November   2020 SN6501-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOT-23 (5) Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOT-23 (5) Package

1 Overview

This document contains information for SN6501-Q1 ( SOT-23 (5) package) to aid in a functional safety system design. Information provided are:

  • Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and their distribution (FMD) based on the primary function of the device
  • Pin failure mode analysis (Pin FMA)

Figure 1-1 shows the device functional block diagram for reference.

GUID-20200914-CA0I-XWDL-M6HD-DF1ZC8WC5CXJ-low.gif Figure 1-1 Functional Block Diagram

SN6501-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.