SLAAE47A May   2022  – August 2022 DAC11001A , DAC11001B

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2DAC Error Sources
    1. 2.1 Offset Error
    2. 2.2 Gain Error
    3. 2.3 Integral Non Linearity (INL)
    4. 2.4 Noise Sources
  5. 3Error Sources from Reference
    1. 3.1 Initial Accuracy
    2. 3.2 Temperature Drift
    3. 3.3 Load Regulation Error
    4. 3.4 Line Regulation Error
    5. 3.5 0.1 - 10 Hz Peak-to-Peak Noise
    6. 3.6 Example Using REF7025
  6. 4Error Sources from Inverting and Non-Inverting Gain Stage
    1. 4.1 Input Offset Voltage Error
    2. 4.2 Input Offset Voltage Drift Error
    3. 4.3 Power Supply Rejection Ratio (PSRR) Error
    4. 4.4 Open Loop Gain Error
    5. 4.5 Resistor Tolerance Error
  7. 5Example Calculation using DAC11001A
  8. 6Error Summary
  9. 7References
  10. 8Revision History

5 Example Calculation using DAC11001A

Referring to Figure 1-1 for the circuit example, we can calculate the error from all sources which are mentioned below.

Table 5-1 Reference Non-inverting Amplifier (OPA828)
Error Source Error in ppm
Input Offset Voltage 140
Offset voltage drift 60
Bias Current 0.6
Offset Current 0.3
Resistor Tolerance 100.01
Resistor Tolerance Drift 499.88
Total 532.05
Table 5-2 Reference Buffer (OPA828)
Error Source Error in ppm
Input Offset Voltage 140
Offset voltage drift 60
Total 152.32
Table 5-3 Reference Inverting Amplifier (OPA828)
Error Source Error in ppm
Input Offset Voltage 210
Offset voltage drift 90
Bias Current 1.2
Offset Current 0.6
Resistor Tolerance 200.02
Resistor Tolerance Drift 0.25
Total 303.66
Table 5-4 R2R DAC (DAC11001A)
Error Source Error in ppm
Integral Non Linearity 1.9
Zero Code Error 3.81
Zero Code Drift 40
Gain Error 10
Gain Error Drift 40
Total 57.95
Table 5-5 Voltage Reference (REF6025)
Error Source Error in ppm
Initial Error 250
Temperature Coefficient Error 200
Load Regulation 75
Total 525
Table 5-6 DAC Output Buffer (OPA828)
Error Source Error in ppm
Input Offset Voltage 70
Offset Voltage Drift 30
Total 76.2