SLAAE47A May   2022  – August 2022 DAC11001A , DAC11001B

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2DAC Error Sources
    1. 2.1 Offset Error
    2. 2.2 Gain Error
    3. 2.3 Integral Non Linearity (INL)
    4. 2.4 Noise Sources
  5. 3Error Sources from Reference
    1. 3.1 Initial Accuracy
    2. 3.2 Temperature Drift
    3. 3.3 Load Regulation Error
    4. 3.4 Line Regulation Error
    5. 3.5 0.1 - 10 Hz Peak-to-Peak Noise
    6. 3.6 Example Using REF7025
  6. 4Error Sources from Inverting and Non-Inverting Gain Stage
    1. 4.1 Input Offset Voltage Error
    2. 4.2 Input Offset Voltage Drift Error
    3. 4.3 Power Supply Rejection Ratio (PSRR) Error
    4. 4.4 Open Loop Gain Error
    5. 4.5 Resistor Tolerance Error
  7. 5Example Calculation using DAC11001A
  8. 6Error Summary
  9. 7References
  10. 8Revision History

2.4 Noise Sources

At any given code, the DAC, reference buffer, and output buffer noise sources error due to the noise sources comprises of DAC, reference buffers and output buffer contribute to the total noise error. These errors comprises of both voltage and current noises from reference buffers and ouput buffer. Current noises from the operational amplifiers in the inverting and non-inverting stages manifests as voltage noise due to the presence of the resistors in the amplifier stages.

At code Dn, noise at the output of the buffer will be:

Equation 4. Vn(nV/Hz  )= Vn02 + Dn220× Vn12 +1 - Dn220 × Vn22  +  + Vn32 

Where,

Vn = Total Noise at the output of the DAC

Dn = DAC Code

Vn0 = Noise from DAC

Vn1 = Output Noise from the non-inverting reference buffer

Vn2 = Output Noise from the inverting reference buffer

Vn3 = Noise from the output buffer

In Equation 4, Vn1, Vn2 and Vn3 includes both voltage and current noise.