SLAA396A June   2008  – September 2018 MSP430F5131 , MSP430F5132 , MSP430F5151 , MSP430F5152 , MSP430F5171 , MSP430F5172 , MSP430F5232 , MSP430F5234 , MSP430F5237 , MSP430F5239 , MSP430F5242 , MSP430F5244 , MSP430F5247 , MSP430F5249 , MSP430F5252 , MSP430F5253 , MSP430F5254 , MSP430F5255 , MSP430F5256 , MSP430F5257 , MSP430F5258 , MSP430F5259 , MSP430F5304 , MSP430F5308 , MSP430F5309 , MSP430F5310 , MSP430F5324 , MSP430F5325 , MSP430F5326 , MSP430F5327 , MSP430F5328 , MSP430F5329 , MSP430F5333 , MSP430F5336 , MSP430F5338 , MSP430F5340 , MSP430F5341 , MSP430F5342 , MSP430F5418 , MSP430F5418A , MSP430F5419 , MSP430F5419A , MSP430F5435 , MSP430F5435A , MSP430F5436 , MSP430F5436A , MSP430F5437 , MSP430F5437A , MSP430F5438 , MSP430F5438A , MSP430F5500 , MSP430F5501 , MSP430F5502 , MSP430F5503 , MSP430F5504 , MSP430F5505 , MSP430F5506 , MSP430F5507 , MSP430F5508 , MSP430F5509 , MSP430F5510 , MSP430F5630 , MSP430F5631 , MSP430F5632 , MSP430F5633 , MSP430F5634 , MSP430F5635 , MSP430F5636 , MSP430F5637 , MSP430F5638

 

  1.   MSP430F5xx Overview and Comparison to MSP430F2xx and MSP430F4xx
    1.     Trademarks
    2. 1 Introduction
    3. 2 Memory Mapping
    4. 3 Core Modules
      1. 3.1 Central Processing Unit (CPUX)
      2. 3.2 Power Management Module (PMM)
      3. 3.3 Unified Clock System (UCS)
      4. 3.4 System Module (SYS)
      5. 3.5 JTAG Enhanced Emulation Module (JTAG/EEM)
    5. 4 Peripheral Modules
      1. 4.1 Timer_A
      2. 4.2 Timer_B
      3. 4.3 RTC_A
      4. 4.4 DMA
      5. 4.5 MPY32
      6. 4.6 Universal Serial Communication Interface (USCI)
      7. 4.7 Digital I/O
      8. 4.8 Cyclic Redundancy Check (CRC-CCITT)
      9. 4.9 ADC12_A
  2.   Revision History

2 Memory Mapping

The MSP430F5xx family memory space has changed significantly from the MSP430F2xx and MSP430F4xx device families. Changes were required to support future peripheral expansion, increased memory options, and future extensions.

The peripheral space has been expanded up to 4KB to support current peripheral set and future additions. There is no longer byte-only peripheral space. In general, most peripheral registers can be accessed in byte or word formats, however, there are some exceptions.

RAM space now begins at 01C00h for all MSP430F5xx devices. There is a moving boundary between RAM and program space depending on the size of the RAM.

The interrupt vector space still resides up to the upper boundary of the 64-KB address space, however, the number of vectors has been increased to support up to 64 interrupt vectors. All interrupt vectors should be used with symbolic programming, because the order and number of vectors can change from device to device. See the device-specific data sheet for allocated vectors and their priorities.

The bootloader (BSL) memory allocation has been increased to 2KB to support various BSL options, including the capability for a user-generated BSL.