SFFS855A December   2024  – June 2026 LMR60430-Q1 , LMR60440 , LMR60440-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 RAK Package
    2. 2.2 RBM Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 RAK Package
    2. 4.2 RBM Package
  7. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the LMR60430, LMR60430-Q1, LMR60440, and LMR60440-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 throughTable 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • The application circuit is used according to the LMR60430, LMR60430-Q1, LMR60440, and LMR60440-Q1 datasheets.