SFFS832A September   2024  – September 2026 UCC27301A-Q1 , UCC27302A-Q1 , UCC27311A-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOIC Package
    2. 2.2 VSON Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOIC Package
    2. 4.2 VSON Package
  7. 5Revision History

4.2 VSON Package

Figure 4-2 shows the UCC273x1A-Q1 and UCC27302A-Q1 pin diagram for the VSON package. For a detailed description of the device pins, see the Pin Configuration and Functions section in the UCC273x1A-Q1 and UCC27302A-Q1 datasheet.

UCC27301A-Q1 UCC27311A-Q1 UCC27302A-Q1 Pin Diagram (VSON Package)Figure 4-2 Pin Diagram (VSON Package)
Table 4-6 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
VDD1No power is applied to the device. HO and LO are in a low state. B
NC2No impact.D
HB3HO and LO are in unknown state.A
HO4HO and LO are in unknown state.A
HS5HO and LO are in unknown state.A
EN6 HO and LO are in a low state. B
HI7 HO is in a low state. B
LI8 LO is in a low state. B
VSS9N/AD
LO10HO and LO are in unknown state.A
Table 4-7 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
VDD1No power is applied to the device. HO and LO are in a low state. B
NC2No impact.D
HB3HO is pulled to HS potential.B
HO4HO is disconnected from the system.B
HS5HO is pulled to HB potential.B
EN6 HO and LO are in a low state. B
HI7 HO is in a low state. B
LI8 LO is in a low state. B
VSS9HO is in a low state. LO is pulled to VDD.B
LO10LO is disconnected from the system.B
Table 4-8 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure EffectsFailure Effect Class
VDD1NCNo impactD
NC2HBNo impactD
HB3HOHO is in unknown state.A
HO4HSHO is in unknown state.A
HS5N/AN/AD
EN6HIHO and LO follows the logic truth table per the datasheet with EN and HI same potential. The logic states of EN and HI depends on the system.B
HI7LIHO and LO follows the logic truth table per the datasheet with LI and HI same potential. The logic states of EN and HI depends on the system.B
LI8VSSLO is in a low state.B
VSS9LOLO is in unknown state.A
LO10N/AN/AD
Table 4-9 Pin FMA for Device Pins Short-Circuited to Supply
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
VDD1N/AD
NC2N/AD
HB3HO and LO are in unknown state.A
HO4HO and LO are in unknown state.A
HS5HO and LO are in unknown state.A
EN6LO and HO follow the truth table specified in the datasheet with EN stuck in a high state.B
HI7LO and HO follow the truth table specified in the datasheet with HI stuck in a high state.B
LI8LO and HO follow the truth table specified in the datasheet with LI stuck in a high state.B
VSS9Supply short condition. LO and HO states depend on the system. If VSS is pulled to VDD, LO is pulled to VDD and HO is in a low state.B
LO10HO and LO are in unknown state.A