SFFS167B september   2021  – july 2023 ADS117L11 , ADS127L11 , ADS127L21

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 TSSOP Package
    2. 2.2 WQFN Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 TSSOP Package
    2. 4.2 WQFN Package
  7. 5Revision History

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the ADS117L11 (WQFN package) ADS127L11 (TSSOP and WQFN packages), and ADS127L21 (WQFN package). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-6 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
Class Failure Effects
A Potential device damage that affects functionality.
B No device damage, but loss of functionality.
C No device damage, but performance degradation.
D No device damage, no impact to functionality or performance.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • AVDD1 = AVDD2 = IOVDD = 5 V
  • AVSS = Thermal pad voltage = 0 V
  • IOVDD power-supply voltage is the same supply voltage used for driving the digital inputs
  • Short-circuit to supply means short to AVDD1 = AVDD2 = IOVDD
  • Short-circuit to ground means short to DGND = AVSS
  • The VCM output voltage is actively used in the external circuit to establish the input common-mode voltage
  • The device is the only peripheral device on the SPI bus
  • Series resistors are used on the analog inputs and are sized to limit the input currents into the analog inputs to <10 mA in all circumstances, such as if the device is unpowered with an input signal applied