SFFS028A June   2022  – November 2025 TMP112-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOT563-6 Package
    2. 2.2 X2SON-5 Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOT563-6 Package
    2. 4.2 X2SON-5 Package
  7. 5Revision History

4.1 SOT563-6 Package

Figure 4-1 shows the TMP112-Q1 and TMP112D-Q1 pin diagram for the SOT563-6 package. For a detailed description of the device pins, see the Pin Configuration and Functions section in the TMP112-Q1 and TMP112D-Q1 datasheet.

TMP112-Q1 TMP112D-Q1 Pin Diagram (SOT563-6) PackageFigure 4-1 Pin Diagram (SOT563-6) Package
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
SCL1The SCL pin is stuck low. I2C communication is not possible.B
GND2There is no effect on the device. The device operates as normal.D
ALERT3The ALERT pin is stuck low. The device is not functional, a false thermal limit triggers.B
ADD04The I2C address selection is limited. I2C communication is potentially corrupted.B
V+5The device is not powered. The device is not functional. The device is potentially damaged.A
SDA6The SDA pin is stuck low. I2C communication is not possible.B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
SCL1The state of the SCL pin is undetermined. I2C communication is not possible.B
GND2The functionality of the device is undetermined. The device is potentially not powered or connects to GND internally through the ESD diode of the alternate pin and powers on.B
ALERT3The ALERT pin is stuck low. The device is not functional, a false thermal limit potentially triggers.B
ADD04The I2C address selection is limited. I2C communication is potentially corrupted.B
V+5The device is not powered if all other pins are held low; the device is not functional. The device potentially powers up through ESD diodes to the V+ pin if voltages above the power-on reset threshold for the device are present on any of the pins of the device.B
SDA6The state of the SDA pin is undetermined. I2C communication is not possible.B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure EffectsFailure Effect Class
SCL1GNDThe SCL pin is stuck low. I2C communication is not possible.B
GND2ALERTThe ALERT pin is stuck low. The device is not functional, a false thermal limit potentially triggers.B
ALERT3ADD0If the ADD0 pin is connected to GND, the ALERT pin is stuck low and not functional and a thermal limit triggers.
If the ADD0 pin is connected to the SCL or SDA pin, the ALERT pin toggles between high and low as communication occurs, potentially triggering thermal limits.
If the ADD0 pin is connected to the V+ pin, the ALERT pin is stuck high and a thermal limit does not trigger.		B
ADD04V+The I2C address selection is limited. I2C communication is potentially corrupted.B
V+5SDAThe SDA pin is stuck high. I2C communication is not possible.B
SDA6SCLI2C communication cannot occur, data corruption occurs.B
Table 4-5 Pin FMA for Device Pins Short-Circuited to Supply
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
SCL1The SCL pin is stuck high. I2C communication is not possible.B
GND2The functionality of the device is undetermined. The device is potentially damaged.A
ALERT3The ALERT pin is stuck high. The device is not functional. Thermal limit does not trigger.B
ADD04The I2C address selection is limited. I2C communication is potentially corrupted.B
V+5There is no effect on the device. The device operates as normal.D
SDA6The SDA pin is stuck high. I2C communication is not possible.B