SDAA081 September   2025 DP83825I

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Troubleshooting the Application
    1. 2.1 Schematic Checklist
    2. 2.2 Device Health Checks
      1. 2.2.1 Voltage Checks
      2. 2.2.2 Probe the RESET_N Signal
      3. 2.2.3 Probe RBIAS
      4. 2.2.4 Probe the XI Clock
      5. 2.2.5 Probe the Strap Pins During Initialization
      6. 2.2.6 Probe the Serial Management Interface (MDC, MDIO)
        1. 2.2.6.1 Read and Check Register Values
    3. 2.3 MDI Health Checks
      1. 2.3.1 Magnetics
      2. 2.3.2 Probe the MDI Signals
      3. 2.3.3 Check the Link Quality
      4. 2.3.4 Compliance
    4. 2.4 RMII Health Check
    5. 2.5 Loopback and PRBS
      1. 2.5.1 Loopback Modes
      2. 2.5.2 Transmitting and Receiving Packets with the MAC
      3. 2.5.3 Transmitting and Receiving Packets with BIST
  6. 3Summary
  7. 4References

2.4 RMII Health Check

This section dives into device health checks which makes sure that the device's RMII section is operating properly. The DP83825 offers two modes of RMII operation: RMII Leader and RMII Follower.

In RMII Leader operation, the DP83825 operates from either a 25MHz CMOS-level oscillator connected to XI pin or a 25MHz crystal connected across XI and XO pins. A 50MHz output clock referenced from DP83825 need to be connected to the MAC.

In RMII Follower operation, the DP83825 operates from a 50MHz CMOS-level oscillator connected to the XI pin and shares the same clock as the MAC. Alternatively, the PHY can operate from a 50MHz clock provided by the Host MAC.

The RMII specification has the following characteristics:

  • Supports 100BASE-TX and 10BASE-Te
  • Single clock reference sourced from the MAC to PHY (or from an external source)
  • Provides independent 2-bit wide transmit and receive data paths
  • Uses CMOS signal levels

The RMII mode of operation is configured via hardware strapping on RX_D1. Register 0x0017[7] can confirm whether RX_D1 is strapped to RMII leader or follower mode. The RMII signals are summarized in Table 2-7.

Table 2-7 RMII Signals
FunctionPins
Receive Data LinesTX_D [1:0]
Transmit Data LinesRX_D [1:0]
Receive Control SignalTX_EN
Transmit Control SignalCRS_DV
RMII Follower Signaling - MAC Follower ConfigurationFigure 2-10 RMII Follower Signaling - MAC Follower Configuration
RMII Follower Signaling - MAC Leader ConfigurationFigure 2-11 RMII Follower Signaling - MAC Leader Configuration
RMII Leader Signaling Figure 2-12 RMII Leader Signaling

Data on TX_D [1:0] is latched at the PHY with reference to the 50MHz-clock in RMII Leader and Follower modes. Data on RX_D [1:0] is provided with reference to the 50MHz clock. In addition, CRS_DV can be configured as an RX_DV signal. This allows a simpler method of recovering receive data without the need to separate RX_DV from the CRS_DV indication.

RMII 50MHz Clock (Blue) and Data (Green) Figure 2-13 RMII 50MHz Clock (Blue) and Data (Green)