SDAA067A August   2025  – March 2026 DP83826AE , DP83826AI , DP83826E , DP83826I

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Critical Design Change for DP83826Ax Rollover
  6. 3Difference Between DP83826x and DP83826Ax
    1. 3.1 Fast Link-Drop (FLD) Strap Configuration
      1. 3.1.1 Basic Mode
      2. 3.1.2 Enhanced Mode
    2. 3.2 EMC Performance
  7. 4Summary
  8. 5References
  9. 6Revision History

3.1.1 Basic Mode

In DP83826x BASIC mode, fast link-drop is enabled by default. Fast link-drop is enabled for RX Error Count and Signal/Energy Loss mechanisms.

In DP83826Ax BASIC mode, fast link-drop is still enabled by default. Additional FLD mechanisms in BASIC mode can be determined by Strap11 as shown in Table 2-1.

Table 3-1 DP83826Ax Basic Mode FLD Configuration
Strap ConfigurationRX Error CountMLT3 Error CountLow SNR ThresholdSignal/Energy LossDescrambler Link Loss
Strap11 = Low (default)EnabledEnabled

Disabled

Enabled

Disabled

Strap11 = HighDisabledDisabled

For both DP83826x/DP83826Ax, additional configuration can be programmed using the Control Register #3 (CR3 Register, register address 0x000B). Bits[3:0] and bit[10] allow for various FLD conditions to be enabled.

For best EMC performance that DP83826Ax can offer, TI recommends enabling only the Signal/Energy loss FLD mechanism. This can be achieved by writing 0x000B = 0x0001 in register configuration or setting strap11 HIGH.