SBOA412 August   2020 TLV314-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SC70-5 Package
    2. 2.2 SOT-23 Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SC70-5 Package
    2. 4.2 SOT-23 Package

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TLV314-Q1 (SC70-5 and SOT-23 package). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to Ground (see Pin FMA for Device Pins Short-Circuited to Ground.)
  • Pin open-circuited (see Pin FMA for Device Pins Open-Circuited.
  • Pin short-circuited to an adjacent pin (see Pin FMA for Device Pins Short-Circuited to Adjacent Pin.)
  • Pin short-circuited to supply (see Pin FMA for Device Pins Short-Circuited to Supply.)

Pin FMA for Device Pins Short-Circuited to Ground through Pin FMA for Device Pins Short-Circuited to Supply also indicate how these pin conditions can affect the device as per the failure effects classification in TI Classification of Failure Effects.

Table 4-1 TI Classification of Failure Effects
Class Failure Effects
A Potential device damage that affects functionality
B No device damage, but loss of functionality
C No device damage, but performance degradation
D No device damage, no impact to functionality or performance

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Single-supply operation is used. For example, V+ = 5 V and V- = 0 V