SBAA809 June 2026 TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
This application brief provides the details of possible optimizations on TDA4x devices following SPL bootflow.
Currently, on K3 architecture-based devices, the boot architecture is designed as follows:
R5 SPL -> ATF -> OPTEE -> A72 SPL -> U-BOOT -> Kernel
Figure 1 Normal Boot Flow
Figure 2 Image Format (Normal Boot Flow)ROM supports boot only via MCU(R5). This means that the bootloader has to run on the R5 core. However, keeping faster boot time in mind, the semi-falcon boot mode or falcon boot mode can be utilized.
Semi-Falcon Boot is used to significantly speed up embedded system startup by having the R5 Secondary Program Loader (R5 SPL) load the u-boot image to A core directly, bypassing the Axx Core Secondary Program Loader. This thus prevents the overhead caused by loading and executing the A Core Secondary Program Loader.
The semi falcon boot flow is as follows:
R5 SPL -> ATF -> OPTEE -> -> U-BOOT -> Kernel
Figure 3 Semi-Falcon Boot Flow
Figure 4 Image Format(Semi-Falcon Boot Flow)To enable semi falcon boot mode, the following steps were followed:
'CONFIG_TEXT_BASE' corresponds to the location where U-BOOT is loaded in memory.
Normal: 8.448ms(upto Starting kernel ...print)
Semi-falcon : 8.176ms(upto Starting kernel ...print)
The following FAQ contains the patches required to enable this feature across Jacinto SoCs.
Falcon Boot is used to significantly speed up embedded system startup by having the Secondary Program Loader (SPL) load the kernel directly, bypassing the full U-Boot bootloader.
The falcon boot flow is as follows:
R5 SPL -> ATF -> OPTEE -> Kernel
Figure 5 Falcon Boot Flow
Figure 6 Image Format (Falcon Boot Flow)Normal : 8.272 sec (upto Starting kernel ...print)
Falcon : 2.7sec (upto Starting kernel ...print)
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