ZHCSN01 December   2022 BQ25628 , BQ25629

PRODUCTION DATA  

1. 1 特性
2. 2 应用
3. 3 说明
4. 4 Revision History
5. 5 说明（续）
6. 6 Device Comparison
7. 7 Pin Configuration and Functions
8. 8 Specifications
   1. 8.1 Absolute Maximum Ratings
   2. 8.2 ESD Ratings
   3. 8.3 Recommended Operating Conditions
   4. 8.4 Thermal Information
   5. 8.5 Electrical Characteristics
   6. 8.6 Timing Requirements
   7. 8.7 Typical Characteristics
9. 9 Detailed Description
   1. 9.1 Overview
   2. 9.2 Functional Block Diagram
   3. 9.3 Feature Description
      1. 9.3.1 Power-On-Reset (POR)
      2. 9.3.2 Device Power Up from Battery
      3. 9.3.3 Device Power Up from Input Source
         1. 9.3.3.1 REGN LDO Power Up
         2. 9.3.3.2 Poor Source Qualification
         3. 9.3.3.3 D+/D– Detection Sets Input Current Limit (BQ25629)
         4. 9.3.3.4 ILIM Pin (BQ25628 Only)
         5. 9.3.3.5 Input Voltage Limit Threshold Setting (VINDPM Threshold)
         6. 9.3.3.6 Converter Power-Up
      4. 9.3.4 Power Path Management
         1. 9.3.4.1 Narrow VDC Architecture
         2. 9.3.4.2 Dynamic Power Management
         3. 9.3.4.3 High Impedance Mode
      5. 9.3.5 Battery Charging Management
         1. 9.3.5.1 Autonomous Charging Cycle
         2. 9.3.5.2 Battery Charging Profile
         3. 9.3.5.3 Charging Termination
         4. 9.3.5.4 Thermistor Qualification
            1. 9.3.5.4.1 Advanced Temperature Profile in Charge Mode
            2. 9.3.5.4.2 TS Pin Thermistor Configuration
            3. 9.3.5.4.3 Cold/Hot Temperature Window in OTG Mode
            4. 9.3.5.4.4 JEITA Charge Rate Scaling
            5. 9.3.5.4.5 TS_BIAS Pin
         5. 9.3.5.5 Charging Safety Timers
      6. 9.3.6 USB On-The-Go (OTG)
         1. 9.3.6.1 Boost OTG Mode
         2. 9.3.6.2 Bypass OTG Mode
         3. 9.3.6.3 PMID Voltage Indicator ( PMID_GD)
      7. 9.3.7 Integrated 12-Bit ADC for Monitoring
      8. 9.3.8 Status Outputs ( STAT, INT)
         1. 9.3.8.1 Charging Status Indicator (STAT)
         2. 9.3.8.2 Interrupt to Host ( INT)
      9. 9.3.9 BATFET Control
         1. 9.3.9.1 Shutdown Mode
         2. 9.3.9.2 Ship Mode
         3. 9.3.9.3 System Power Reset
   4. 9.4 Device Functional Modes
      1. 9.4.1 Host Mode and Default Mode
      2. 9.4.2 Register Bit Reset
   5. 9.5 Programming
      1. 9.5.1 Serial Interface
         1. 9.5.1.1 Data Validity
         2. 9.5.1.2 START and STOP Conditions
         3. 9.5.1.3 Byte Format
         4. 9.5.1.4 Acknowledge (ACK) and Not Acknowledge (NACK)
         5. 9.5.1.5 Target Address and Data Direction Bit
         6. 9.5.1.6 Single Write and Read
         7. 9.5.1.7 Multi-Write and Multi-Read
   6. 9.6 Register Maps
      1. 9.6.1 Register Programming
      2. 9.6.2 BQ25628 Registers
10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
       1. 10.2.1 Design Requirements
       2. 10.2.2 Detailed Design Procedure
          1. 10.2.2.1 Inductor Selection
          2. 10.2.2.2 Input Capacitor
          3. 10.2.2.3 Output Capacitor
       3. 10.2.3 Application Curves
11. 11Power Supply Recommendations
12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
13. 13Device and Documentation Support
    1. 13.1 Device Support
       1. 13.1.1 第三方产品免责声明
    2. 13.2 Documentation Support
       1. 13.2.1 Related Documentation
    3. 13.3 接收文档更新通知
    4. 13.4 支持资源
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 术语表
14. 14Mechanical, Packaging, and Orderable Information