SLVSJ14 August   2025 UCC57132-Q1 , UCC57138-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Stage
      2. 6.3.2 Enable/Fault (EN/FLT)
      3. 6.3.3 Driver Stage
      4. 6.3.4 Overcurrent (OC) Protection
      5. 6.3.5 Thermal Shutdown
    4. 6.4 Device Functional Modes
  8. 7  Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Driving MOSFET/IGBT/SiC MOSFET
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 VDD Undervoltage Lockout
          2. 7.2.1.2.2 Power Dissipation
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Consideration
  9. 8 Device and Documentation Support
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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订购信息

5.5 Electrical Characteristics

VDD = 15 V, VEE = 0 V, 1-µF capacitor from VDD to COM, 1-µF capacitor from VEE to COM, TJ = –40°C to +150°C, CL = 0 pF, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENTS
IVDDQ VDD quiescent supply current VIN = 3.3 V, EN = 5V, VDD = 6.5 V 1.3 mA
IVDD VDD static supply current VIN = 3.3 V, EN = 5 V 0.7 1.5 mA
IVDD VDD static supply current VIN = 0 V, EN = 5 V 0.7 1.1 mA
IVEEQ VEE static supply current VIN = 0 V, EN = 5 V, VEE = -10 V 1.1 mA
IVDDO VDD dynamic operating current fSW = 1MHz, EN = 5 V, VDD=15 V, CL=1.8 nF 30 mA
IDIS VDD disable current VIN = 3.3 V, EN = 0 V 0.8 1.1 mA
VDD UNDERVOLTAGE THRESHOLDS AND DELAY
VVDD_ON VDD UVLO Rising Threshold 8 V UVLO Option 7.65 8 8.35 V
VVDD_OFF VDD UVLO Falling Threshold 6.65 7 7.35 V
VVDD_HYS VDD UVLO Threshold Hysteresis 1 V
tUVLO2FLT Propagation delay from UVLO to FLT 2 µs
VVDD_ON VDD UVLO Rising Threshold 12 V UVLO Option 12.8 13.5 14.2 V
VVDD_OFF VDD UVLO Falling Threshold 11.8 12.5 13.2 V
VVDD_HYS VDD UVLO Threshold Hysteresis 1 V
IN, EN/FLT
VINH Input High Threshold Voltage 1.8 2.2 2.6 V
VINL Input Low Threshold Voltage 0.8 1.2 1.6 V
VIN_HYS Input-threshold Hysteresis 1 V
RIND IN Pin Pull Down Resistance 115 kΩ
VENH Enable High Threshold Voltage 1.8 2.2 2.6 V
VENL Enable Low Threshold Voltage 0.8 1.2 1.6 V
VEN_HYS Enable Threshold Hysteresis 1 V
RENU EN Pin Pull Up Resistance 2 MΩ
IFLTth FLT threshold  VFLT-sink = 400 mV,  Tj=25 °C 18 mA
OC DETECTION
VOCTH OC detection threshold, referenced to GND (UCC5713X) 500 mV option 474 500 526 mV
VOCTL OC release threshold, referenced to GND (UCC5713X) 500 mV option 463 488 513 mV
tOCFIL(1) OC deglitch filter ( 8V-UVLO version) 70 ns
tOCFIL(1) OC deglitch filter (12V-UVLO version) 190 ns
tOC2OUT(1) OC propagation delay to 90% of OUT (8V-UVLO version) 115 145 ns
tOC2OUT(1) OC propagation delay to 90% of OUT (12V-UVLO version) 230 350 ns
tOC2FLT(1) OC propagation delay to 90% of EN/FLT low(8V-UVLO version) 115 150 ns
tOC2FLT(1) OC propagation delay to 90% of EN/FLT low(12V-UVLO version) 220 320 ns
tOCLEB(1) OC Leading edge blanking time( 8V-UVLO version) 60 80 ns
tOCLEB(1) OC Leading edge blanking time( 12V-UVLO version) 180 250 ns
OVERTEMPERATURE PROTECTION
TSD(1) Overtemperature threshold 180 ℃
THYS(1) Overtemperature protection hysteresis 30 ℃
tOTP2FLT(1) Propagation delay from overtemperature shutdown to FLT Over temperature shutdown to 90% of FLT, Cl=10 pF 8 us
OUTPUT DRIVER STAGE
ISRCPK(1) Peak Output Source Current CVDD = 10 µF, CL = 0.1 µF, f = 1 kHz -3 A
ISNKPK(1) Peak Output Sink Current CVDD = 10 µF, CL = 0.1 µF, f = 1 kHz 3 A
ROH Pull up resistance IOUT = –500 mA 5 Ω
ROL Pull down resistance IOUT = 50 mA 1 Ω
(1) Parameter are not tested in production